#ifndef __ASM_MACE_H__
#define __ASM_MACE_H__
+#include <linux/config.h>
+#include <asm/io.h>
+
/*
* Address map
*/
#define MACE_BASE 0x1f000000 /* physical */
#undef BIT
-#define BIT(x) (1UL << (x))
+#define BIT(x) (1ULL << (x))
+
+#ifdef CONFIG_MIPS32
+typedef struct {
+ volatile unsigned long long reg;
+} mace64_t;
+
+typedef struct {
+ unsigned long pad;
+ volatile unsigned long reg;
+} mace32_t;
+#endif
+#ifdef CONFIG_MIPS64
+typedef struct {
+ volatile unsigned long reg;
+} mace64_t;
+
+typedef struct {
+ volatile unsigned long reg;
+} mace32_t;
+#endif
+
+#define mace_read(r) \
+ (sizeof(r.reg) == 4 ? readl(&r.reg) : readq(&r.reg))
+#define mace_write(v,r) \
+ (sizeof(r.reg) == 4 ? writel(v,&r.reg) : writeq(v,&r.reg))
/*
* PCI interface
* Video interface
*/
struct mace_video {
- unsigned long xxx; /* later... */
+ mace32_t xxx; /* later... */
};
/*
* Ethernet interface
*/
struct mace_ethernet {
- volatile unsigned long mac_ctrl;
- volatile unsigned long int_stat;
- volatile unsigned long dma_ctrl;
- volatile unsigned long timer;
- volatile unsigned long tx_int_al;
- volatile unsigned long rx_int_al;
- volatile unsigned long tx_info;
- volatile unsigned long tx_info_al;
- volatile unsigned long rx_buff;
- volatile unsigned long rx_buff_al1;
- volatile unsigned long rx_buff_al2;
- volatile unsigned long diag;
- volatile unsigned long phy_data;
- volatile unsigned long phy_regs;
- volatile unsigned long phy_trans_go;
- volatile unsigned long backoff_seed;
+ mace32_t mac_ctrl;
+ mace32_t int_stat;
+ mace32_t dma_ctrl;
+ mace32_t timer;
+ mace32_t tx_int_al;
+ mace32_t rx_int_al;
+ mace32_t tx_info;
+ mace32_t tx_info_al;
+ mace32_t rx_buff;
+ mace32_t rx_buff_al1;
+ mace32_t rx_buff_al2;
+ mace64_t diag;
+ mace32_t phy_data;
+ mace32_t phy_regs;
+ mace32_t phy_trans_go;
+ mace32_t backoff_seed;
/*===================================*/
- volatile unsigned long imq_reserved[4];
- volatile unsigned long mac_addr;
- volatile unsigned long mac_addr2;
- volatile unsigned long mcast_filter;
- volatile unsigned long tx_ring_base;
+ mace64_t imq_reserved[4];
+ mace64_t mac_addr;
+ mace64_t mac_addr2;
+ mace64_t mcast_filter;
+ mace32_t tx_ring_base;
/* Following are read-only registers for debugging */
- volatile unsigned long tx_pkt1_hdr;
- volatile unsigned long tx_pkt1_ptr[3];
- volatile unsigned long tx_pkt2_hdr;
- volatile unsigned long tx_pkt2_ptr[3];
+ mace64_t tx_pkt1_hdr;
+ mace64_t tx_pkt1_ptr[3];
+ mace64_t tx_pkt2_hdr;
+ mace64_t tx_pkt2_ptr[3];
/*===================================*/
- volatile unsigned long rx_fifo;
+ mace32_t rx_fifo;
};
+#define mace_eth_read(r) \
+ mace_read(mace->eth.r)
+#define mace_eth_write(v,r) \
+ mace_write(v,mace->eth.r)
+
/*
* Peripherals
/* Audio registers */
struct mace_audio {
- volatile unsigned long control;
- volatile unsigned long codec_control; /* codec status control */
- volatile unsigned long codec_mask; /* codec status input mask */
- volatile unsigned long codec_read; /* codec status read data */
+ mace32_t control;
+ mace32_t codec_control; /* codec status control */
+ mace32_t codec_mask; /* codec status input mask */
+ mace32_t codec_read; /* codec status read data */
struct {
- volatile unsigned long control; /* channel control */
- volatile unsigned long read_ptr; /* channel read pointer */
- volatile unsigned long write_ptr; /* channel write pointer */
- volatile unsigned long depth; /* channel depth */
- } chan[3];
+ mace32_t control; /* channel control */
+ mace32_t read_ptr; /* channel read pointer */
+ mace32_t write_ptr; /* channel write pointer */
+ mace32_t depth; /* channel depth */
+ } channel[3];
};
+#define mace_perif_audio_read(r) \
+ mace_read(mace->perif.audio.r)
+#define mace_perif_audio_write(v,r) \
+ mace_write(v,mace->perif.audio.r)
/* ISA Control and DMA registers */
struct mace_isactrl {
- volatile unsigned long ringbase;
+ mace32_t ringbase;
#define MACEISA_RINGBUFFERS_SIZE (8 * 4096)
- volatile unsigned long misc;
+ mace32_t misc;
#define MACEISA_FLASH_WE BIT(0) /* 1=> Enable FLASH writes */
#define MACEISA_PWD_CLEAR BIT(1) /* 1=> PWD CLEAR jumper detected */
#define MACEISA_NIC_DEASSERT BIT(2)
#define MACEISA_LED_GREEN BIT(5) /* 0=> Illuminate green LED */
#define MACEISA_DP_RAM_ENABLE BIT(6)
- volatile unsigned long istat;
- volatile unsigned long imask;
+ mace32_t istat;
+ mace32_t imask;
#define MACEISA_AUDIO_SW_INT BIT(0)
#define MACEISA_AUDIO_SC_INT BIT(1)
#define MACEISA_AUDIO1_DMAT_INT BIT(2)
#define MACEISA_SERIAL2_RDMAT_INT BIT(30)
#define MACEISA_SERIAL2_RDMAOR_INT BIT(31)
- volatile unsigned long _pad[0x2000/8 - 4];
+ mace64_t _pad[0x2000/8 - 4];
- volatile unsigned long dp_ram[0x400];
+ mace64_t dp_ram[0x400];
};
+#define mace_perif_ctrl_read(r) \
+ mace_read(mace->perif.ctrl.r)
+#define mace_perif_ctrl_write(v,r) \
+ mace_write(v,mace->perif.ctrl.r)
/* Keyboard & Mouse registers
* -> drivers/input/serio/maceps2.c */
struct mace_ps2port {
- volatile unsigned long tx;
- volatile unsigned long rx;
- volatile unsigned long control;
- volatile unsigned long status;
+ mace32_t tx;
+ mace32_t rx;
+ mace32_t control;
+ mace32_t status;
};
struct mace_ps2 {
/* I2C registers
* -> drivers/i2c/algos/i2c-algo-sgi.c */
struct mace_i2c {
- volatile unsigned long config;
+ mace32_t config;
#define MACEI2C_RESET BIT(0)
#define MACEI2C_FAST BIT(1)
#define MACEI2C_DATA_OVERRIDE BIT(2)
#define MACEI2C_CLOCK_OVERRIDE BIT(3)
#define MACEI2C_DATA_STATUS BIT(4)
#define MACEI2C_CLOCK_STATUS BIT(5)
- volatile unsigned long control;
- volatile unsigned long data;
+ mace32_t control;
+ mace32_t data;
};
/* Timer registers */
typedef union {
- volatile unsigned long ust_msc;
+ mace64_t ust_msc;
struct reg {
volatile unsigned int ust;
volatile unsigned int msc;
} timer_reg;
struct mace_timers {
- volatile unsigned long ust;
+ mace32_t ust;
#define MACE_UST_PERIOD_NS 960
- volatile unsigned long compare1;
- volatile unsigned long compare2;
- volatile unsigned long compare3;
+ mace32_t compare1;
+ mace32_t compare2;
+ mace32_t compare3;
timer_reg audio_in;
timer_reg audio_out1;
/* Serial port */
struct mace_serial {
- volatile unsigned long xxx; /* later... */
+ mace64_t xxx; /* later... */
};
struct mace_isa {