fedora core 6 1.2949 + vserver 2.2.0

[linux-2.6.git] / include / asm-mips / mach-ev64120 / mach-gt64120.h

diff --git a/include/asm-mips/mach-ev64120/mach-gt64120.h b/include/asm-mips/mach-ev64120/mach-gt64120.h
index 0e5bc40..7e272ce 100644 (file)
--- a/include/asm-mips/mach-ev64120/mach-gt64120.h
+++ b/include/asm-mips/mach-ev64120/mach-gt64120.h
@@ -18,30 +18,31 @@ extern unsigned long gt64120_base;
 /*
  *   PCI Bus allocation
  */
-#define GT_PCI_MEM_BASE    0x12000000UL
-#define GT_PCI_MEM_SIZE    0x02000000UL
-#define GT_PCI_IO_BASE     0x10000000UL
-#define GT_PCI_IO_SIZE     0x02000000UL
-#define GT_ISA_IO_BASE     PCI_IO_BASE
+#define GT_PCI_MEM_BASE        0x12000000UL
+#define GT_PCI_MEM_SIZE        0x02000000UL
+#define GT_PCI_IO_BASE 0x10000000UL
+#define GT_PCI_IO_SIZE 0x02000000UL
+#define GT_ISA_IO_BASE PCI_IO_BASE
 
 /*
  *   Duart I/O ports.
  */
-#define EV64120_COM1_BASE_ADDR  (0x1d000000 + 0x20)
-#define EV64120_COM2_BASE_ADDR  (0x1d000000 + 0x00)
+#define EV64120_COM1_BASE_ADDR (0x1d000000 + 0x20)
+#define EV64120_COM2_BASE_ADDR (0x1d000000 + 0x00)
 
 
 /*
  *   EV64120 interrupt controller register base.
  */
-#define EV64120_ICTRL_REGS_BASE   (KSEG1ADDR(0x1f000000))
+#define EV64120_ICTRL_REGS_BASE        (KSEG1ADDR(0x1f000000))
 
 /*
  *   EV64120 UART register base.
  */
-#define EV64120_UART0_REGS_BASE    (KSEG1ADDR(EV64120_COM1_BASE_ADDR))
-#define EV64120_UART1_REGS_BASE    (KSEG1ADDR(EV64120_COM2_BASE_ADDR))
+#define EV64120_UART0_REGS_BASE        (KSEG1ADDR(EV64120_COM1_BASE_ADDR))
+#define EV64120_UART1_REGS_BASE        (KSEG1ADDR(EV64120_COM2_BASE_ADDR))
 #define EV64120_BASE_BAUD ( 3686400 / 16 )
+#define EV64120_UART_IRQ       6
 
 /*
  * PCI interrupts will come in on either the INTA or INTD interrups lines,