* We used to implement 41 bits by having an order 1 pmd level but that seemed
* rather pointless.
*
- * For 8kB page size we use a 3 level page tree which permits a total of
- * 8TB of address space. Alternatively a 33-bit / 8GB organization using
- * two levels would be easy to implement.
- *
- * For 16kB page size we use a 2 level page tree which permits a total of
+ * For 16kB page size we use a 2 level page tree which permit a total of
* 36 bits of virtual address space. We could add a third leve. but it seems
* like at the moment there's no need for this.
*
#define PMD_ORDER 1
#define PTE_ORDER 0
#endif
-#ifdef CONFIG_PAGE_SIZE_8KB
-#define PGD_ORDER 0
-#define PMD_ORDER 0
-#define PTE_ORDER 0
-#endif
#ifdef CONFIG_PAGE_SIZE_16KB
#define PGD_ORDER 0
#define PMD_ORDER 0
#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
#endif
+/*
+ * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset
+ * into this range:
+ */
+#define pte_to_pgoff(_pte) \
+ ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
+
+#define pgoff_to_pte(off) \
+ ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
+
#define __pgd_offset(address) pgd_index(address)
#define page_pte(page) page_pte_prot(page, __pgprot(0))
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
-/*
- * Bits 0, 1, 2, 7 and 8 are taken, split up the 32 bits of offset
- * into this range:
- */
-#define PTE_FILE_MAX_BITS 32
-
-#define pte_to_pgoff(_pte) \
- ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
-
-#define pgoff_to_pte(off) \
- ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
-
/*
* Used for the b0rked handling of kernel pagetables on the 64-bit kernel.
*/