This commit was manufactured by cvs2svn to create tag

[linux-2.6.git] / include / asm-mips / processor.h

diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index b461fd0..a502e83 100644 (file)
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -12,15 +12,79 @@
 #define _ASM_PROCESSOR_H
 
 #include <linux/config.h>
+#include <linux/cache.h>
 #include <linux/threads.h>
 
 #include <asm/cachectl.h>
 #include <asm/cpu.h>
-#include <asm/cpu-info.h>
 #include <asm/mipsregs.h>
 #include <asm/prefetch.h>
 #include <asm/system.h>
 
+#ifdef CONFIG_SGI_IP27
+#include <asm/sn/types.h>
+#endif
+
+/*
+ * Descriptor for a cache
+ */
+struct cache_desc {
+       unsigned short linesz;  /* Size of line in bytes */
+       unsigned short ways;    /* Number of ways */
+       unsigned short sets;    /* Number of lines per set */
+       unsigned int waysize;   /* Bytes per way */
+       unsigned int waybit;    /* Bits to select in a cache set */
+       unsigned int flags;     /* Flags describing cache properties */
+};
+
+/*
+ * Flag definitions
+ */
+#define MIPS_CACHE_NOT_PRESENT 0x00000001
+#define MIPS_CACHE_VTAG                0x00000002      /* Virtually tagged cache */
+#define MIPS_CACHE_ALIASES     0x00000004      /* Cache could have aliases */
+#define MIPS_CACHE_IC_F_DC     0x00000008      /* Ic can refill from D-cache */
+
+struct cpuinfo_mips {
+       unsigned long           udelay_val;
+       unsigned long           asid_cache;
+#if defined(CONFIG_SGI_IP27)
+//     cpuid_t         p_cpuid;        /* PROM assigned cpuid */
+       cnodeid_t       p_nodeid;       /* my node ID in compact-id-space */
+       nasid_t         p_nasid;        /* my node ID in numa-as-id-space */
+       unsigned char   p_slice;        /* Physical position on node board */
+#endif
+#if 0
+       unsigned long           loops_per_sec;
+       unsigned long           ipi_count;
+       unsigned long           irq_attempt[NR_IRQS];
+       unsigned long           smp_local_irq_count;
+       unsigned long           prof_multiplier;
+       unsigned long           prof_counter;
+#endif
+
+       /*
+        * Capability and feature descriptor structure for MIPS CPU
+        */
+       unsigned long           options;
+       unsigned int            processor_id;
+       unsigned int            fpu_id;
+       unsigned int            cputype;
+       int                     isa_level;
+       int                     tlbsize;
+       struct cache_desc       icache; /* Primary I-cache */
+       struct cache_desc       dcache; /* Primary D or combined I/D cache */
+       struct cache_desc       scache; /* Secondary cache */
+       struct cache_desc       tcache; /* Tertiary/split secondary cache */
+       void                    *data;  /* Additional data */
+} __attribute__((aligned(SMP_CACHE_BYTES)));
+
+extern struct cpuinfo_mips cpu_data[];
+#define current_cpu_data cpu_data[smp_processor_id()]
+
+extern void cpu_probe(void);
+extern void cpu_report(void);
+
 /*
  * Return current * instruction pointer ("program counter").
  */
@@ -79,7 +143,7 @@ extern unsigned int vced_count, vcei_count;
 
 #define NUM_FPU_REGS   32
 
-typedef __u64 fpureg_t;
+typedef u64 fpureg_t;
 
 struct mips_fpu_hard_struct {
        fpureg_t        fpr[NUM_FPU_REGS];
@@ -171,6 +235,8 @@ struct thread_struct {
        MF_FIXADE, 0, 0 \
 }
 
+#ifdef __KERNEL__
+
 struct task_struct;
 
 /* Free all resources held by a thread. */
@@ -198,6 +264,8 @@ unsigned long get_wchan(struct task_struct *p);
 
 #define cpu_relax()    barrier()
 
+#endif /* __KERNEL__ */
+
 /*
  * Return_address is a replacement for __builtin_return_address(count)
  * which on certain architectures cannot reasonably be implemented in GCC