* pci_io_base returns the memory address at which you can access
* the I/O space for PCI bus number `bus' (or NULL on error).
*/
-extern void *pci_bus_io_base(unsigned int bus);
+extern void __iomem *pci_bus_io_base(unsigned int bus);
extern unsigned long pci_bus_io_base_phys(unsigned int bus);
extern unsigned long pci_bus_mem_base_phys(unsigned int bus);
int last_busno;
int bus_offset;
- void *io_base_virt;
+ void __iomem *io_base_virt;
unsigned long io_base_phys;
/* Some machines (PReP) have a non 1:1 mapping of
unsigned long pci_mem_offset;
struct pci_ops *ops;
- volatile unsigned int *cfg_addr;
- volatile unsigned char *cfg_data;
+ volatile unsigned int __iomem *cfg_addr;
+ volatile void __iomem *cfg_data;
/*
* If set, indirect method will set the cfg_type bit as
* needed to generate type 1 configuration transactions.
struct resource mem_space;
};
+static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
+{
+ return bus->sysdata;
+}
+
/* These are used for config access before all the PCI probing
has been done. */
int early_read_config_byte(struct pci_controller *hose, int bus, int dev_fn,
int early_write_config_dword(struct pci_controller *hose, int bus, int dev_fn,
int where, u32 val);
+extern void setup_indirect_pci_nomap(struct pci_controller* hose,
+ void __iomem *cfg_addr, void __iomem *cfg_data);
extern void setup_indirect_pci(struct pci_controller* hose,
u32 cfg_addr, u32 cfg_data);
extern void setup_grackle(struct pci_controller *hose);
*/
extern int pciauto_bus_scan(struct pci_controller *, int);
+#ifdef CONFIG_PCI
+extern unsigned long pci_address_to_pio(phys_addr_t address);
+#else
+static inline unsigned long pci_address_to_pio(phys_addr_t address)
+{
+ return (unsigned long)-1;
+}
+#endif
+
#endif
#endif /* __KERNEL__ */