#ifndef _PPC64_EEH_H
#define _PPC64_EEH_H
-#include <linux/string.h>
+#include <linux/config.h>
#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/string.h>
struct pci_dev;
+struct device_node;
+struct device_node;
+struct notifier_block;
-/* I/O addresses are converted to EEH "tokens" such that a driver will cause
- * a bad page fault if the address is used directly (i.e. these addresses are
- * never actually mapped. Translation between IO <-> EEH region is 1 to 1.
- */
-#define IO_TOKEN_TO_ADDR(token) \
- (((unsigned long)(token) & ~(0xfUL << REGION_SHIFT)) | \
- (IO_REGION_ID << REGION_SHIFT))
-
-#define IO_ADDR_TO_TOKEN(addr) \
- (((unsigned long)(addr) & ~(0xfUL << REGION_SHIFT)) | \
- (EEH_REGION_ID << REGION_SHIFT))
+#ifdef CONFIG_EEH
/* Values for eeh_mode bits in device_node */
#define EEH_MODE_SUPPORTED (1<<0)
#define EEH_MODE_NOCHECK (1<<1)
+#define EEH_MODE_ISOLATED (1<<2)
-extern void __init eeh_init(void);
-unsigned long eeh_check_failure(void *token, unsigned long val);
-void *eeh_ioremap(unsigned long addr, void *vaddr);
+void __init eeh_init(void);
+unsigned long eeh_check_failure(const volatile void __iomem *token,
+ unsigned long val);
+int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev);
void __init pci_addr_cache_build(void);
/**
- * eeh_add_device - perform EEH initialization for the indicated pci device
- * @dev: pci device for which to set up EEH
+ * eeh_add_device_early
+ * eeh_add_device_late
*
- * This routine can be used to perform EEH initialization for PCI
- * devices that were added after system boot (e.g. hotplug, dlpar).
- * Whether this actually enables EEH or not for this device depends
- * on the type of the device, on earlier boot command-line
- * arguments & etc.
+ * Perform eeh initialization for devices added after boot.
+ * Call eeh_add_device_early before doing any i/o to the
+ * device (including config space i/o). Call eeh_add_device_late
+ * to finish the eeh setup for this device.
*/
-void eeh_add_device(struct pci_dev *);
+void eeh_add_device_early(struct device_node *);
+void eeh_add_device_late(struct pci_dev *);
/**
* eeh_remove_device - undo EEH setup for the indicated pci device
#define EEH_ENABLE 1
#define EEH_RELEASE_LOADSTORE 2
#define EEH_RELEASE_DMA 3
-int eeh_set_option(struct pci_dev *dev, int options);
-/*
+/**
+ * Notifier event flags.
+ */
+#define EEH_NOTIFY_FREEZE 1
+
+/** EEH event -- structure holding pci slot data that describes
+ * a change in the isolation status of a PCI slot. A pointer
+ * to this struct is passed as the data pointer in a notify callback.
+ */
+struct eeh_event {
+ struct list_head list;
+ struct pci_dev *dev;
+ struct device_node *dn;
+ int reset_state;
+};
+
+/** Register to find out about EEH events. */
+int eeh_register_notifier(struct notifier_block *nb);
+int eeh_unregister_notifier(struct notifier_block *nb);
+
+/**
* EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
*
- * Order this macro for performance.
- * If EEH is off for a device and it is a memory BAR, ioremap will
- * map it to the IOREGION. In this case addr == vaddr and since these
- * should be in registers we compare them first. Next we check for
- * ff's which indicates a (very) possible failure.
- *
* If this macro yields TRUE, the caller relays to eeh_check_failure()
* which does further tests out of line.
*/
-#define EEH_POSSIBLE_IO_ERROR(val, type) ((val) == (type)~0)
+#define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0)
-/* The vaddr will equal the addr if EEH checking is disabled for
- * this device. This is because eeh_ioremap() will not have
- * remapped to 0xA0, and thus both vaddr and addr will be 0xE0...
+/*
+ * Reads from a device which has been isolated by EEH will return
+ * all 1s. This macro gives an all-1s value of the given size (in
+ * bytes: 1, 2, or 4) for comparing with the result of a read.
*/
-#define EEH_POSSIBLE_ERROR(addr, vaddr, val, type) \
- ((vaddr) != (addr) && EEH_POSSIBLE_IO_ERROR(val, type))
+#define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8))
+
+#else
+#define eeh_init()
+#define eeh_check_failure(token, val) (val)
+#define eeh_dn_check_failure(dn, dev) (0)
+#define pci_addr_cache_build()
+#define eeh_add_device_early(dn)
+#define eeh_add_device_late(dev)
+#define eeh_remove_device(dev)
+#define EEH_POSSIBLE_ERROR(val, type) (0)
+#define EEH_IO_ERROR_VALUE(size) (-1UL)
+#endif
/*
* MMIO read/write operations with EEH support.
*/
-static inline u8 eeh_readb(void *addr) {
- volatile u8 *vaddr = (volatile u8 *)IO_TOKEN_TO_ADDR(addr);
- u8 val = in_8(vaddr);
- if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u8))
+static inline u8 eeh_readb(const volatile void __iomem *addr)
+{
+ u8 val = in_8(addr);
+ if (EEH_POSSIBLE_ERROR(val, u8))
return eeh_check_failure(addr, val);
return val;
}
-static inline void eeh_writeb(u8 val, void *addr) {
- volatile u8 *vaddr = (volatile u8 *)IO_TOKEN_TO_ADDR(addr);
- out_8(vaddr, val);
+static inline void eeh_writeb(u8 val, volatile void __iomem *addr)
+{
+ out_8(addr, val);
}
-static inline u16 eeh_readw(void *addr) {
- volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
- u16 val = in_le16(vaddr);
- if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u16))
+static inline u16 eeh_readw(const volatile void __iomem *addr)
+{
+ u16 val = in_le16(addr);
+ if (EEH_POSSIBLE_ERROR(val, u16))
return eeh_check_failure(addr, val);
return val;
}
-static inline void eeh_writew(u16 val, void *addr) {
- volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
- out_le16(vaddr, val);
+static inline void eeh_writew(u16 val, volatile void __iomem *addr)
+{
+ out_le16(addr, val);
}
-static inline u16 eeh_raw_readw(void *addr) {
- volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
- u16 val = in_be16(vaddr);
- if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u16))
+static inline u16 eeh_raw_readw(const volatile void __iomem *addr)
+{
+ u16 val = in_be16(addr);
+ if (EEH_POSSIBLE_ERROR(val, u16))
return eeh_check_failure(addr, val);
return val;
}
-static inline void eeh_raw_writew(u16 val, void *addr) {
- volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
+static inline void eeh_raw_writew(u16 val, volatile void __iomem *addr) {
+ volatile u16 __iomem *vaddr = (volatile u16 __iomem *) addr;
out_be16(vaddr, val);
}
-static inline u32 eeh_readl(void *addr) {
- volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
- u32 val = in_le32(vaddr);
- if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u32))
+static inline u32 eeh_readl(const volatile void __iomem *addr)
+{
+ u32 val = in_le32(addr);
+ if (EEH_POSSIBLE_ERROR(val, u32))
return eeh_check_failure(addr, val);
return val;
}
-static inline void eeh_writel(u32 val, void *addr) {
- volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
- out_le32(vaddr, val);
+static inline void eeh_writel(u32 val, volatile void __iomem *addr)
+{
+ out_le32(addr, val);
}
-static inline u32 eeh_raw_readl(void *addr) {
- volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
- u32 val = in_be32(vaddr);
- if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u32))
+static inline u32 eeh_raw_readl(const volatile void __iomem *addr)
+{
+ u32 val = in_be32(addr);
+ if (EEH_POSSIBLE_ERROR(val, u32))
return eeh_check_failure(addr, val);
return val;
}
-static inline void eeh_raw_writel(u32 val, void *addr) {
- volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
- out_be32(vaddr, val);
+static inline void eeh_raw_writel(u32 val, volatile void __iomem *addr)
+{
+ out_be32(addr, val);
}
-static inline u64 eeh_readq(void *addr) {
- volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr);
- u64 val = in_le64(vaddr);
- if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u64))
+static inline u64 eeh_readq(const volatile void __iomem *addr)
+{
+ u64 val = in_le64(addr);
+ if (EEH_POSSIBLE_ERROR(val, u64))
return eeh_check_failure(addr, val);
return val;
}
-static inline void eeh_writeq(u64 val, void *addr) {
- volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr);
- out_le64(vaddr, val);
+static inline void eeh_writeq(u64 val, volatile void __iomem *addr)
+{
+ out_le64(addr, val);
}
-static inline u64 eeh_raw_readq(void *addr) {
- volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr);
- u64 val = in_be64(vaddr);
- if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u64))
+static inline u64 eeh_raw_readq(const volatile void __iomem *addr)
+{
+ u64 val = in_be64(addr);
+ if (EEH_POSSIBLE_ERROR(val, u64))
return eeh_check_failure(addr, val);
return val;
}
-static inline void eeh_raw_writeq(u64 val, void *addr) {
- volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr);
- out_be64(vaddr, val);
+static inline void eeh_raw_writeq(u64 val, volatile void __iomem *addr)
+{
+ out_be64(addr, val);
}
-static inline void eeh_memset_io(void *addr, int c, unsigned long n) {
- void *vaddr = (void *)IO_TOKEN_TO_ADDR(addr);
- memset(vaddr, c, n);
+#define EEH_CHECK_ALIGN(v,a) \
+ ((((unsigned long)(v)) & ((a) - 1)) == 0)
+
+static inline void eeh_memset_io(volatile void __iomem *addr, int c,
+ unsigned long n)
+{
+ u32 lc = c;
+ lc |= lc << 8;
+ lc |= lc << 16;
+
+ while(n && !EEH_CHECK_ALIGN(addr, 4)) {
+ *((volatile u8 *)addr) = c;
+ addr = (void *)((unsigned long)addr + 1);
+ n--;
+ }
+ while(n >= 4) {
+ *((volatile u32 *)addr) = lc;
+ addr = (void *)((unsigned long)addr + 4);
+ n -= 4;
+ }
+ while(n) {
+ *((volatile u8 *)addr) = c;
+ addr = (void *)((unsigned long)addr + 1);
+ n--;
+ }
+ __asm__ __volatile__ ("sync" : : : "memory");
}
-static inline void eeh_memcpy_fromio(void *dest, void *src, unsigned long n) {
- void *vsrc = (void *)IO_TOKEN_TO_ADDR(src);
- memcpy(dest, vsrc, n);
+static inline void eeh_memcpy_fromio(void *dest, const volatile void __iomem *src,
+ unsigned long n)
+{
+ void *vsrc = (void __force *) src;
+ void *destsave = dest;
+ unsigned long nsave = n;
+
+ while(n && (!EEH_CHECK_ALIGN(vsrc, 4) || !EEH_CHECK_ALIGN(dest, 4))) {
+ *((u8 *)dest) = *((volatile u8 *)vsrc);
+ __asm__ __volatile__ ("eieio" : : : "memory");
+ vsrc = (void *)((unsigned long)vsrc + 1);
+ dest = (void *)((unsigned long)dest + 1);
+ n--;
+ }
+ while(n > 4) {
+ *((u32 *)dest) = *((volatile u32 *)vsrc);
+ __asm__ __volatile__ ("eieio" : : : "memory");
+ vsrc = (void *)((unsigned long)vsrc + 4);
+ dest = (void *)((unsigned long)dest + 4);
+ n -= 4;
+ }
+ while(n) {
+ *((u8 *)dest) = *((volatile u8 *)vsrc);
+ __asm__ __volatile__ ("eieio" : : : "memory");
+ vsrc = (void *)((unsigned long)vsrc + 1);
+ dest = (void *)((unsigned long)dest + 1);
+ n--;
+ }
+ __asm__ __volatile__ ("sync" : : : "memory");
+
/* Look for ffff's here at dest[n]. Assume that at least 4 bytes
* were copied. Check all four bytes.
*/
- if ((n >= 4) &&
- (EEH_POSSIBLE_ERROR(src, vsrc, (*((u32 *) dest+n-4)), u32))) {
- eeh_check_failure(src, (*((u32 *) dest+n-4)));
+ if ((nsave >= 4) &&
+ (EEH_POSSIBLE_ERROR((*((u32 *) destsave+nsave-4)), u32))) {
+ eeh_check_failure(src, (*((u32 *) destsave+nsave-4)));
}
}
-static inline void eeh_memcpy_toio(void *dest, void *src, unsigned long n) {
- void *vdest = (void *)IO_TOKEN_TO_ADDR(dest);
- memcpy(vdest, src, n);
+static inline void eeh_memcpy_toio(volatile void __iomem *dest, const void *src,
+ unsigned long n)
+{
+ void *vdest = (void __force *) dest;
+
+ while(n && (!EEH_CHECK_ALIGN(vdest, 4) || !EEH_CHECK_ALIGN(src, 4))) {
+ *((volatile u8 *)vdest) = *((u8 *)src);
+ src = (void *)((unsigned long)src + 1);
+ vdest = (void *)((unsigned long)vdest + 1);
+ n--;
+ }
+ while(n > 4) {
+ *((volatile u32 *)vdest) = *((volatile u32 *)src);
+ src = (void *)((unsigned long)src + 4);
+ vdest = (void *)((unsigned long)vdest + 4);
+ n-=4;
+ }
+ while(n) {
+ *((volatile u8 *)vdest) = *((u8 *)src);
+ src = (void *)((unsigned long)src + 1);
+ vdest = (void *)((unsigned long)vdest + 1);
+ n--;
+ }
+ __asm__ __volatile__ ("sync" : : : "memory");
}
-#define MAX_ISA_PORT 0x10000
-extern unsigned long io_page_mask;
-#define _IO_IS_VALID(port) ((port) >= MAX_ISA_PORT || (1 << (port>>PAGE_SHIFT)) & io_page_mask)
+#undef EEH_CHECK_ALIGN
-static inline u8 eeh_inb(unsigned long port) {
+static inline u8 eeh_inb(unsigned long port)
+{
u8 val;
if (!_IO_IS_VALID(port))
return ~0;
- val = in_8((u8 *)(port+pci_io_base));
- if (EEH_POSSIBLE_IO_ERROR(val, u8))
- return eeh_check_failure((void*)(port), val);
+ val = in_8((u8 __iomem *)(port+pci_io_base));
+ if (EEH_POSSIBLE_ERROR(val, u8))
+ return eeh_check_failure((void __iomem *)(port), val);
return val;
}
-static inline void eeh_outb(u8 val, unsigned long port) {
+static inline void eeh_outb(u8 val, unsigned long port)
+{
if (_IO_IS_VALID(port))
- return out_8((u8 *)(port+pci_io_base), val);
+ out_8((u8 __iomem *)(port+pci_io_base), val);
}
-static inline u16 eeh_inw(unsigned long port) {
+static inline u16 eeh_inw(unsigned long port)
+{
u16 val;
if (!_IO_IS_VALID(port))
return ~0;
- val = in_le16((u16 *)(port+pci_io_base));
- if (EEH_POSSIBLE_IO_ERROR(val, u16))
- return eeh_check_failure((void*)(port), val);
+ val = in_le16((u16 __iomem *)(port+pci_io_base));
+ if (EEH_POSSIBLE_ERROR(val, u16))
+ return eeh_check_failure((void __iomem *)(port), val);
return val;
}
-static inline void eeh_outw(u16 val, unsigned long port) {
+static inline void eeh_outw(u16 val, unsigned long port)
+{
if (_IO_IS_VALID(port))
- return out_le16((u16 *)(port+pci_io_base), val);
+ out_le16((u16 __iomem *)(port+pci_io_base), val);
}
-static inline u32 eeh_inl(unsigned long port) {
+static inline u32 eeh_inl(unsigned long port)
+{
u32 val;
if (!_IO_IS_VALID(port))
return ~0;
- val = in_le32((u32 *)(port+pci_io_base));
- if (EEH_POSSIBLE_IO_ERROR(val, u32))
- return eeh_check_failure((void*)(port), val);
+ val = in_le32((u32 __iomem *)(port+pci_io_base));
+ if (EEH_POSSIBLE_ERROR(val, u32))
+ return eeh_check_failure((void __iomem *)(port), val);
return val;
}
-static inline void eeh_outl(u32 val, unsigned long port) {
+static inline void eeh_outl(u32 val, unsigned long port)
+{
if (_IO_IS_VALID(port))
- return out_le32((u32 *)(port+pci_io_base), val);
+ out_le32((u32 __iomem *)(port+pci_io_base), val);
}
/* in-string eeh macros */
-static inline void eeh_insb(unsigned long port, void * buf, int ns) {
- _insb((u8 *)(port+pci_io_base), buf, ns);
- if (EEH_POSSIBLE_IO_ERROR((*(((u8*)buf)+ns-1)), u8))
- eeh_check_failure((void*)(port), *(u8*)buf);
+static inline void eeh_insb(unsigned long port, void * buf, int ns)
+{
+ _insb((u8 __iomem *)(port+pci_io_base), buf, ns);
+ if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8))
+ eeh_check_failure((void __iomem *)(port), *(u8*)buf);
}
-static inline void eeh_insw_ns(unsigned long port, void * buf, int ns) {
- _insw_ns((u16 *)(port+pci_io_base), buf, ns);
- if (EEH_POSSIBLE_IO_ERROR((*(((u16*)buf)+ns-1)), u16))
- eeh_check_failure((void*)(port), *(u16*)buf);
+static inline void eeh_insw_ns(unsigned long port, void * buf, int ns)
+{
+ _insw_ns((u16 __iomem *)(port+pci_io_base), buf, ns);
+ if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16))
+ eeh_check_failure((void __iomem *)(port), *(u16*)buf);
}
-static inline void eeh_insl_ns(unsigned long port, void * buf, int nl) {
- _insl_ns((u32 *)(port+pci_io_base), buf, nl);
- if (EEH_POSSIBLE_IO_ERROR((*(((u32*)buf)+nl-1)), u32))
- eeh_check_failure((void*)(port), *(u32*)buf);
+static inline void eeh_insl_ns(unsigned long port, void * buf, int nl)
+{
+ _insl_ns((u32 __iomem *)(port+pci_io_base), buf, nl);
+ if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32))
+ eeh_check_failure((void __iomem *)(port), *(u32*)buf);
}
#endif /* _PPC64_EEH_H */
git://git.onelab.eu / linux-2.6.git / blobdiff