#define __LC_IO_NEW_PSW 0x01f0
#endif /* !__s390x__ */
+#define __LC_IPL_PARMBLOCK_PTR 0x014
#define __LC_EXT_PARAMS 0x080
#define __LC_CPU_ADDRESS 0x084
#define __LC_EXT_INT_CODE 0x086
#define __LC_PER_ATMID 0x096
#define __LC_PER_ADDRESS 0x098
#define __LC_PER_ACCESS_ID 0x0A1
+#define __LC_AR_MODE_ID 0x0A3
#define __LC_SUBCHANNEL_ID 0x0B8
#define __LC_SUBCHANNEL_NR 0x0BA
#define __LC_RETURN_PSW 0x200
-#define __LC_IRB 0x210
-
-#define __LC_DIAG44_OPCODE 0x250
-
#define __LC_SAVE_AREA 0xC00
#ifndef __s390x__
+#define __LC_IRB 0x208
+#define __LC_SYNC_ENTER_TIMER 0x248
+#define __LC_ASYNC_ENTER_TIMER 0x250
+#define __LC_EXIT_TIMER 0x258
+#define __LC_LAST_UPDATE_TIMER 0x260
+#define __LC_USER_TIMER 0x268
+#define __LC_SYSTEM_TIMER 0x270
+#define __LC_LAST_UPDATE_CLOCK 0x278
+#define __LC_STEAL_CLOCK 0x280
+#define __LC_RETURN_MCCK_PSW 0x288
#define __LC_KERNEL_STACK 0xC40
#define __LC_THREAD_INFO 0xC44
#define __LC_ASYNC_STACK 0xC48
#define __LC_CURRENT 0xC90
#define __LC_INT_CLOCK 0xC98
#else /* __s390x__ */
+#define __LC_IRB 0x210
+#define __LC_SYNC_ENTER_TIMER 0x250
+#define __LC_ASYNC_ENTER_TIMER 0x258
+#define __LC_EXIT_TIMER 0x260
+#define __LC_LAST_UPDATE_TIMER 0x268
+#define __LC_USER_TIMER 0x270
+#define __LC_SYSTEM_TIMER 0x278
+#define __LC_LAST_UPDATE_CLOCK 0x280
+#define __LC_STEAL_CLOCK 0x288
+#define __LC_RETURN_MCCK_PSW 0x290
#define __LC_KERNEL_STACK 0xD40
#define __LC_THREAD_INFO 0xD48
#define __LC_ASYNC_STACK 0xD50
#define __LC_KERNEL_ASCE 0xD58
#define __LC_USER_ASCE 0xD60
#define __LC_PANIC_STACK 0xD68
-#define __LC_CPUID 0xD90
-#define __LC_CPUADDR 0xD98
+#define __LC_CPUID 0xD80
+#define __LC_CPUADDR 0xD88
#define __LC_IPLDEV 0xDB8
#define __LC_JIFFY_TIMER 0xDC0
#define __LC_CURRENT 0xDD8
-#define __LC_INT_CLOCK 0xDe8
+#define __LC_INT_CLOCK 0xDE8
#endif /* __s390x__ */
-#define __LC_PANIC_MAGIC 0xE00
+#define __LC_PANIC_MAGIC 0xE00
#ifndef __s390x__
#define __LC_PFAULT_INTPARM 0x080
+#define __LC_CPU_TIMER_SAVE_AREA 0x0D8
+#define __LC_CLOCK_COMP_SAVE_AREA 0x0E0
+#define __LC_PSW_SAVE_AREA 0x100
+#define __LC_PREFIX_SAVE_AREA 0x108
#define __LC_AREGS_SAVE_AREA 0x120
+#define __LC_FPREGS_SAVE_AREA 0x160
+#define __LC_GPREGS_SAVE_AREA 0x180
#define __LC_CREGS_SAVE_AREA 0x1C0
#else /* __s390x__ */
#define __LC_PFAULT_INTPARM 0x11B8
+#define __LC_FPREGS_SAVE_AREA 0x1200
+#define __LC_GPREGS_SAVE_AREA 0x1280
+#define __LC_PSW_SAVE_AREA 0x1300
+#define __LC_PREFIX_SAVE_AREA 0x1318
+#define __LC_FP_CREG_SAVE_AREA 0x131C
+#define __LC_TODREG_SAVE_AREA 0x1324
+#define __LC_CPU_TIMER_SAVE_AREA 0x1328
+#define __LC_CLOCK_COMP_SAVE_AREA 0x1331
#define __LC_AREGS_SAVE_AREA 0x1340
#define __LC_CREGS_SAVE_AREA 0x1380
#endif /* __s390x__ */
#ifndef __ASSEMBLY__
-#include <linux/config.h>
#include <asm/processor.h>
#include <linux/types.h>
#include <asm/sigp.h>
__u16 subchannel_nr; /* 0x0ba */
__u32 io_int_parm; /* 0x0bc */
__u32 io_int_word; /* 0x0c0 */
- __u8 pad3[0xD8-0xC4]; /* 0x0c4 */
+ __u8 pad3[0xD4-0xC4]; /* 0x0c4 */
+ __u32 extended_save_area_addr; /* 0x0d4 */
__u32 cpu_timer_save_area[2]; /* 0x0d8 */
__u32 clock_comp_save_area[2]; /* 0x0e0 */
__u32 mcck_interruption_code[2]; /* 0x0e8 */
psw_t return_psw; /* 0x200 */
__u8 irb[64]; /* 0x208 */
- __u8 pad8[0xc00-0x248]; /* 0x248 */
+ __u64 sync_enter_timer; /* 0x248 */
+ __u64 async_enter_timer; /* 0x250 */
+ __u64 exit_timer; /* 0x258 */
+ __u64 last_update_timer; /* 0x260 */
+ __u64 user_timer; /* 0x268 */
+ __u64 system_timer; /* 0x270 */
+ __u64 last_update_clock; /* 0x278 */
+ __u64 steal_clock; /* 0x280 */
+ psw_t return_mcck_psw; /* 0x288 */
+ __u8 pad8[0xc00-0x290]; /* 0x290 */
/* System info area */
__u32 save_area[16]; /* 0xc00 */
psw_t io_new_psw; /* 0x1f0 */
psw_t return_psw; /* 0x200 */
__u8 irb[64]; /* 0x210 */
- __u32 diag44_opcode; /* 0x250 */
- __u8 pad8[0xc00-0x254]; /* 0x254 */
+ __u64 sync_enter_timer; /* 0x250 */
+ __u64 async_enter_timer; /* 0x258 */
+ __u64 exit_timer; /* 0x260 */
+ __u64 last_update_timer; /* 0x268 */
+ __u64 user_timer; /* 0x270 */
+ __u64 system_timer; /* 0x278 */
+ __u64 last_update_clock; /* 0x280 */
+ __u64 steal_clock; /* 0x288 */
+ psw_t return_mcck_psw; /* 0x290 */
+ __u8 pad8[0xc00-0x2a0]; /* 0x2a0 */
/* System info area */
__u64 save_area[16]; /* 0xc00 */
__u8 pad9[0xd40-0xc80]; /* 0xc80 */
#define S390_lowcore (*((struct _lowcore *) 0))
extern struct _lowcore *lowcore_ptr[];
-extern __inline__ void set_prefix(__u32 address)
+static inline void set_prefix(__u32 address)
{
- __asm__ __volatile__ ("spx %0" : : "m" (address) : "memory" );
+ asm volatile("spx %0" : : "m" (address) : "memory");
+}
+
+static inline __u32 store_prefix(void)
+{
+ __u32 address;
+
+ asm volatile("stpx %0" : "=m" (address));
+ return address;
}
#define __PANIC_MAGIC 0xDEADC0DE