#ifndef __ASM_SH_PROCESSOR_H
#define __ASM_SH_PROCESSOR_H
+#ifdef __KERNEL__
+#include <linux/compiler.h>
#include <asm/page.h>
#include <asm/types.h>
#include <asm/cache.h>
-#include <linux/threads.h>
#include <asm/ptrace.h>
+#include <asm/cpu-features.h>
/*
* Default implementation of macro that returns current
#define CCN_CVR 0xff000040
#define CCN_PRR 0xff000044
+const char *get_cpu_subtype(void);
+
/*
* CPU type and hardware bug flags. Kept separately for each CPU.
*
* Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
- * in arch/sh/Kconfig, as well as an entry in arch/sh/kernel/setup.c
+ * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
* for parsing the subtype in get_cpu_subtype().
*/
enum cpu_type {
/* SH-2 types */
- CPU_SH7604,
+ CPU_SH7604, CPU_SH7619,
+
+ /* SH-2A types */
+ CPU_SH7206,
/* SH-3 types */
- CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R, CPU_SH7709,
- CPU_SH7709A, CPU_SH7729, CPU_SH7300,
+ CPU_SH7705, CPU_SH7706, CPU_SH7707,
+ CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
+ CPU_SH7709, CPU_SH7709A, CPU_SH7710,
+ CPU_SH7729, CPU_SH7300,
/* SH-4 types */
CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
+ /* SH-4A types */
+ CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785,
+
+ /* SH4AL-DSP types */
+ CPU_SH73180, CPU_SH7343, CPU_SH7722,
+
/* Unknown subtype */
CPU_SH_NONE
};
struct sh_cpuinfo {
- enum cpu_type type;
- char hard_math;
+ unsigned int type;
unsigned long loops_per_jiffy;
- unsigned int cpu_clock, master_clock, bus_clock, module_clock;
-#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
- unsigned int memory_clock;
-#endif
-
- struct cache_info icache;
- struct cache_info dcache;
+ struct cache_info icache; /* Primary I-cache */
+ struct cache_info dcache; /* Primary D-cache */
+ struct cache_info scache; /* Secondary cache */
unsigned long flags;
-};
+} __attribute__ ((aligned(SMP_CACHE_BYTES)));
extern struct sh_cpuinfo boot_cpu_data;
struct sh_fpu_soft_struct soft;
};
-/*
- * Processor flags
- */
-
-#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
-#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */
-#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
-#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
-
struct thread_struct {
+ /* Saved registers when thread is descheduled */
unsigned long sp;
unsigned long pc;
- unsigned long trap_no, error_code;
- unsigned long address;
- /* Hardware debugging registers may come here */
+ /* Hardware debugging registers */
unsigned long ubc_pc;
/* floating point info */
union sh_fpu_union fpu;
};
+typedef struct {
+ unsigned long seg;
+} mm_segment_t;
+
/* Count of active tasks with UBC settings */
extern int ubc_usercnt;
#define INIT_THREAD { \
- sizeof(init_stack) + (long) &init_stack, /* sp */ \
- 0, /* pc */ \
- 0, 0, \
- 0, \
- 0, \
- {{{0,}},} /* fpu state */ \
+ .sp = sizeof(init_stack) + (long) &init_stack, \
}
/*
*/
#define start_thread(regs, new_pc, new_sp) \
set_fs(USER_DS); \
- regs->pr = 0; \
+ regs->pr = 0; \
regs->sr = SR_FD; /* User mode. */ \
regs->pc = new_pc; \
regs->regs[15] = new_sp
*/
extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-/*
- * Bus types
- */
-#define MCA_bus 0
-#define MCA_bus__is_a_macro /* for versions in ksyms.c */
-
/* Copy and release all segment info associated with a VM */
#define copy_segments(p, mm) do { } while(0)
#define release_segments(mm) do { } while(0)
#define save_fpu(tsk) do { } while (0)
#endif
-#define unlazy_fpu(tsk, regs) do { \
+#define unlazy_fpu(tsk, regs) do { \
if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
- save_fpu(tsk, regs); \
+ save_fpu(tsk, regs); \
} \
} while (0)
-#define clear_fpu(tsk, regs) do { \
- if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
- clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
- release_fpu(regs); \
+#define clear_fpu(tsk, regs) do { \
+ if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
+ clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
+ release_fpu(regs); \
} \
} while (0)
*/
#define thread_saved_pc(tsk) (tsk->thread.pc)
+void show_trace(struct task_struct *tsk, unsigned long *sp,
+ struct pt_regs *regs);
extern unsigned long get_wchan(struct task_struct *p);
-#define KSTK_EIP(tsk) ((tsk)->thread.pc)
-#define KSTK_ESP(tsk) ((tsk)->thread.sp)
+#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
+#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
-#define cpu_relax() __asm__ __volatile__ ("sleep" : : : "memory")
+#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
+#define cpu_relax() barrier()
+
+#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
+ defined(CONFIG_CPU_SH4)
+#define PREFETCH_STRIDE L1_CACHE_BYTES
+#define ARCH_HAS_PREFETCH
+#define ARCH_HAS_PREFETCHW
+static inline void prefetch(void *x)
+{
+ __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
+}
+
+#define prefetchw(x) prefetch(x)
+#endif
+
+#ifdef CONFIG_VSYSCALL
+extern int vsyscall_init(void);
+#else
+#define vsyscall_init() do { } while (0)
+#endif
+#endif /* __KERNEL__ */
#endif /* __ASM_SH_PROCESSOR_H */
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