#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/pci.h>
+#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/moduleparam.h>
+#include <linux/mutex.h>
+
#include <sound/core.h>
#include <sound/cs8427.h>
#include <sound/info.h>
-#include <sound/mpu401.h>
#include <sound/initval.h>
+#include <sound/tlv.h>
#include <sound/asoundef.h>
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
-static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
+static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
static char *model[SNDRV_CARDS];
-static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
+static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
+static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
module_param_array(model, charp, NULL, 0444);
MODULE_PARM_DESC(model, "Use the given board model.");
+module_param_array(dxr_enable, int, NULL, 0444);
+MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
static struct pci_device_id snd_ice1712_ids[] = {
inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
}
-
/*
*
* CS8427 interface
return 0;
}
+static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
+{
+ /* change CS8427 clock source too */
+ if (ice->cs8427)
+ snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
+ /* notify ak4524 chip as well */
+ if (spdif_is_master) {
+ unsigned int i;
+ for (i = 0; i < ice->akm_codecs; i++) {
+ if (ice->akm[i].ops.set_rate_val)
+ ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
+ }
+ }
+}
/*
* Interrupt handler
*/
-static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
{
struct snd_ice1712 *ice = dev_id;
unsigned char status;
handled = 1;
if (status & ICE1712_IRQ_MPU1) {
if (ice->rmidi[0])
- snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
+ snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
status &= ~ICE1712_IRQ_MPU1;
}
outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
if (status & ICE1712_IRQ_MPU2) {
if (ice->rmidi[1])
- snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data, regs);
+ snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
status &= ~ICE1712_IRQ_MPU2;
}
return change;
}
+static DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
{
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
+ SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "Multi Playback Volume",
.info = snd_ice1712_pro_mixer_volume_info,
.get = snd_ice1712_pro_mixer_volume_get,
.put = snd_ice1712_pro_mixer_volume_put,
.private_value = 0,
.count = 10,
+ .tlv = { .p = db_scale_playback }
},
};
static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
+ SNDRV_CTL_ELEM_ACCESS_TLV_READ),
.name = "H/W Multi Capture Volume",
.info = snd_ice1712_pro_mixer_volume_info,
.get = snd_ice1712_pro_mixer_volume_get,
.put = snd_ice1712_pro_mixer_volume_put,
.private_value = 10,
+ .tlv = { .p = db_scale_playback }
};
static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
+ snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
+ snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
+ snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
}
static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice)
struct snd_info_entry *entry;
if (! snd_card_proc_new(ice->card, "ice1712", &entry))
- snd_info_set_text_ops(entry, ice, 1024, snd_ice1712_proc_read);
+ snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
}
/*
{
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
static unsigned int xrate[13] = {
- 8000, 9600, 11025, 12000, 1600, 22050, 24000,
+ 8000, 9600, 11025, 12000, 16000, 22050, 24000,
32000, 44100, 48000, 64000, 88200, 96000
};
unsigned char oval;
spin_unlock_irq(&ice->reg_lock);
if ((oval & ICE1712_SPDIF_MASTER) !=
- (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) {
- /* change CS8427 clock source too */
- if (ice->cs8427) {
- snd_ice1712_cs8427_set_input_clock(ice, is_spdif_master(ice));
- }
- /* notify ak4524 chip as well */
- if (is_spdif_master(ice)) {
- unsigned int i;
- for (i = 0; i < ice->akm_codecs; i++) {
- if (ice->akm[i].ops.set_rate_val)
- ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
- }
- }
- }
+ (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
+ snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
return change;
}
{
int val;
static unsigned int xrate[13] = {
- 8000, 9600, 11025, 12000, 1600, 22050, 24000,
+ 8000, 9600, 11025, 12000, 16000, 22050, 24000,
32000, 44100, 48000, 64000, 88200, 96000
};
struct snd_ctl_elem_value *ucontrol)
{
static unsigned int xrate[13] = {
- 8000, 9600, 11025, 12000, 1600, 22050, 24000,
+ 8000, 9600, 11025, 12000, 16000, 22050, 24000,
32000, 44100, 48000, 64000, 88200, 96000
};
unsigned char oval;
udelay(200);
outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
udelay(200);
+ if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
+ !ice->dxr_enable)
+ /* Set eeprom value to limit active ADCs and DACs to 6;
+ * Also disable AC97 as no hardware in standard 6fire card/box
+ * Note: DXR extensions are not currently supported
+ */
+ ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
const char *modelname,
int omni,
int cs8427_timeout,
+ int dxr_enable,
struct snd_ice1712 ** r_ice1712)
{
struct snd_ice1712 *ice;
if ((err = pci_enable_device(pci)) < 0)
return err;
/* check, if we can restrict PCI DMA transfers to 28 bits */
- if (pci_set_dma_mask(pci, 0x0fffffff) < 0 ||
- pci_set_consistent_dma_mask(pci, 0x0fffffff) < 0) {
+ if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
+ pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
pci_disable_device(pci);
return -ENXIO;
else if (cs8427_timeout > 1000)
cs8427_timeout = 1000;
ice->cs8427_timeout = cs8427_timeout;
+ ice->dxr_enable = dxr_enable;
spin_lock_init(&ice->reg_lock);
- init_MUTEX(&ice->gpio_mutex);
- init_MUTEX(&ice->i2c_mutex);
- init_MUTEX(&ice->open_mutex);
+ mutex_init(&ice->gpio_mutex);
+ mutex_init(&ice->i2c_mutex);
+ mutex_init(&ice->open_mutex);
ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
ice->gpio.set_data = snd_ice1712_set_gpio_data;
ice->dmapath_port = pci_resource_start(pci, 2);
ice->profi_port = pci_resource_start(pci, 3);
- if (request_irq(pci->irq, snd_ice1712_interrupt, SA_INTERRUPT|SA_SHIRQ,
+ if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
"ICE1712", ice)) {
snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
snd_ice1712_free(ice);
strcpy(card->shortname, "ICEnsemble ICE1712");
if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev],
- cs8427_timeout[dev], &ice)) < 0) {
+ cs8427_timeout[dev], dxr_enable[dev],
+ &ice)) < 0) {
snd_card_free(card);
return err;
}
if (! c->no_mpu401) {
if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
- ICEREG(ice, MPU1_CTRL), 1,
+ ICEREG(ice, MPU1_CTRL),
+ (c->mpu401_1_info_flags |
+ MPU401_INFO_INTEGRATED),
ice->irq, 0,
&ice->rmidi[0])) < 0) {
snd_card_free(card);
return err;
}
-
- if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401)
+ if (c->mpu401_1_name)
+ /* Prefered name available in card_info */
+ snprintf(ice->rmidi[0]->name,
+ sizeof(ice->rmidi[0]->name),
+ "%s %d", c->mpu401_1_name, card->number);
+
+ if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
+ /* 2nd port used */
if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
- ICEREG(ice, MPU2_CTRL), 1,
+ ICEREG(ice, MPU2_CTRL),
+ (c->mpu401_2_info_flags |
+ MPU401_INFO_INTEGRATED),
ice->irq, 0,
&ice->rmidi[1])) < 0) {
snd_card_free(card);
return err;
}
+ if (c->mpu401_2_name)
+ /* Prefered name available in card_info */
+ snprintf(ice->rmidi[1]->name,
+ sizeof(ice->rmidi[1]->name),
+ "%s %d", c->mpu401_2_name,
+ card->number);
+ }
}
+ snd_ice1712_set_input_clock_source(ice, 0);
+
sprintf(card->longname, "%s at 0x%lx, irq %i",
card->shortname, ice->port, ice->irq);