**************************************************************************/
static void ixp4xx_irq_mask(unsigned int irq)
{
- *IXP4XX_ICMR &= ~(1 << irq);
+ if (cpu_is_ixp46x() && irq >= 32)
+ *IXP4XX_ICMR2 &= ~(1 << (irq - 32));
+ else
+ *IXP4XX_ICMR &= ~(1 << irq);
}
static void ixp4xx_irq_mask_ack(unsigned int irq)
static void ixp4xx_irq_unmask(unsigned int irq)
{
- static int irq2gpio[NR_IRQS] = {
+ static int irq2gpio[32] = {
-1, -1, -1, -1, -1, -1, 0, 1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11, 12, -1, -1,
};
- int line = irq2gpio[irq];
+ int line = (irq < 32) ? irq2gpio[irq] : -1;
/*
* This only works for LEVEL gpio IRQs as per the IXP4xx developer's
if (line >= 0)
gpio_line_isr_clear(line);
- *IXP4XX_ICMR |= (1 << irq);
+ if (cpu_is_ixp46x() && irq >= 32)
+ *IXP4XX_ICMR2 |= (1 << (irq - 32));
+ else
+ *IXP4XX_ICMR |= (1 << irq);
}
static struct irqchip ixp4xx_irq_chip = {
/* Disable all interrupt */
*IXP4XX_ICMR = 0x0;
+ if (cpu_is_ixp46x()) {
+ /* Route upper 32 sources to IRQ instead of FIQ */
+ *IXP4XX_ICLR2 = 0x00;
+
+ /* Disable upper 32 interrupts */
+ *IXP4XX_ICMR2 = 0x00;
+ }
+
for(i = 0; i < NR_IRQS; i++)
{
set_irq_chip(i, &ixp4xx_irq_chip);
static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
+ write_seqlock(&xtime_lock);
+
/* Clear Pending Interrupt by writing '1' to it */
*IXP4XX_OSST = IXP4XX_OSST_TIMER_1_PEND;
/*
* Catch up with the real idea of time
*/
- do {
+ while ((*IXP4XX_OSTS - last_jiffy_time) > LATCH) {
timer_tick(regs);
last_jiffy_time += LATCH;
- } while((*IXP4XX_OSTS - last_jiffy_time) > LATCH);
+ }
+
+ write_sequnlock(&xtime_lock);
return IRQ_HANDLED;
}
.handler = ixp4xx_timer_interrupt
};
-void __init ixp4xx_init_time(void)
+static void __init ixp4xx_timer_init(void)
{
- gettimeoffset = ixp4xx_gettimeoffset;
-
/* Clear Pending Interrupt by writing '1' to it */
*IXP4XX_OSST = IXP4XX_OSST_TIMER_1_PEND;
setup_irq(IRQ_IXP4XX_TIMER1, &ixp4xx_timer_irq);
}
+struct sys_timer ixp4xx_timer = {
+ .init = ixp4xx_timer_init,
+ .offset = ixp4xx_gettimeoffset,
+};
+
+static struct resource ixp46x_i2c_resources[] = {
+ [0] = {
+ .start = 0xc8011000,
+ .end = 0xc801101c,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_IXP4XX_I2C,
+ .end = IRQ_IXP4XX_I2C,
+ .flags = IORESOURCE_IRQ
+ }
+};
+
+/*
+ * I2C controller. The IXP46x uses the same block as the IOP3xx, so
+ * we just use the same device name.
+ */
+static struct platform_device ixp46x_i2c_controller = {
+ .name = "IOP3xx-I2C",
+ .id = 0,
+ .num_resources = 2,
+ .resource = ixp46x_i2c_resources
+};
+
+static struct platform_device *ixp46x_devices[] __initdata = {
+ &ixp46x_i2c_controller
+};
+
+void __init ixp4xx_sys_init(void)
+{
+ if (cpu_is_ixp46x()) {
+ platform_add_devices(ixp46x_devices,
+ ARRAY_SIZE(ixp46x_devices));
+ }
+}