linux 2.6.16.38 w/ vs2.0.3-rc1
[linux-2.6.git] / arch / arm / mach-omap2 / clock.h
index 2781dfb..6cab20b 100644 (file)
@@ -33,6 +33,20 @@ static u32 omap2_clksel_get_divisor(struct clk *clk);
 #define RATE_IN_242X   (1 << 0)
 #define RATE_IN_243X   (1 << 1)
 
+/* Memory timings */
+#define M_DDR          1
+#define M_LOCK_CTRL    (1 << 2)
+#define M_UNLOCK       0
+#define M_LOCK         1
+
+struct memory_timings {
+       u32 m_type;             /* ddr = 1, sdr = 0 */
+       u32 dll_mode;           /* use lock mode = 1, unlock mode = 0 */
+       u32 slow_dll_ctrl;      /* unlock mode, dll value for slow speed */
+       u32 fast_dll_ctrl;      /* unlock mode, dll value for fast speed */
+       u32 base_cs;            /* base chip select to use for calculations */
+};
+
 /* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
  * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,CM_CLKSEL_DSP
  * CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL CM_CLKSEL2_PLL, CM_CLKSEL_MDM
@@ -717,16 +731,6 @@ static struct clk sys_clkout2 = {
        .recalc         = &omap2_clksel_recalc,
 };
 
-static struct clk emul_ck = {
-       .name           = "emul_ck",
-       .parent         = &func_54m_ck,
-       .flags          = CLOCK_IN_OMAP242X,
-       .enable_reg     = (void __iomem *)&PRCM_CLKEMUL_CTRL,
-       .enable_bit     = 0,
-       .recalc         = &omap2_propagate_rate,
-
-};
-
 /*
  * MPU clock domain
  *     Clocks:
@@ -1062,7 +1066,7 @@ static struct clk gpt2_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,     /* Bit4 */
-       .enable_bit     = 4,
+       .enable_bit     = 0,
        .recalc         = &omap2_followparent_recalc,
 };
 
@@ -1698,8 +1702,7 @@ static struct clk hdq_fck = {
 };
 
 static struct clk i2c2_ick = {
-       .name           = "i2c_ick",
-       .id             = 2,
+       .name           = "i2c2_ick",
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
@@ -1708,8 +1711,7 @@ static struct clk i2c2_ick = {
 };
 
 static struct clk i2c2_fck = {
-       .name           = "i2c_fck",
-       .id             = 2,
+       .name           = "i2c2_fck",
        .parent         = &func_12m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
@@ -1727,8 +1729,7 @@ static struct clk i2chs2_fck = {
 };
 
 static struct clk i2c1_ick = {
-       .name           = "i2c_ick",
-       .id             = 1,
+       .name           = "i2c1_ick",
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
@@ -1737,8 +1738,7 @@ static struct clk i2c1_ick = {
 };
 
 static struct clk i2c1_fck = {
-       .name           = "i2c_fck",
-       .id             = 1,
+       .name           = "i2c1_fck",
        .parent         = &func_12m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
@@ -1971,7 +1971,6 @@ static struct clk *onchip_clks[] = {
        &wdt1_osc_ck,
        &sys_clkout,
        &sys_clkout2,
-       &emul_ck,
        /* mpu domain clocks */
        &mpu_ck,
        /* dsp domain clocks */