* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+#include <linux/config.h>
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/hardware.h>
mrc p15, 0, r5, c13, c0, 0 @ PID
mrc p15, 0, r6, c3, c0, 0 @ Domain ID
mrc p15, 0, r7, c2, c0, 0 @ translation table base address
- mrc p15, 0, r8, c1, c0, 0 @ control register
+ mrc p15, 0, r8, c2, c0, 0 @ auxiliary control register
+ mrc p15, 0, r9, c1, c0, 0 @ control register
stmia r0, { r4 - r13 }
@@ flush the caches to ensure everything is back out to
@@ SDRAM before the core powers down
-#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
bl arm920_flush_kern_cache_all
-#endif
@@ prepare cpu to sleep
*/
ENTRY(s3c2410_cpu_resume)
- mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
+ mov r0, #PSR_I_BIT | PSR_F_BIT | MODE_SVC
msr cpsr_c, r0
@@ load UART to allow us to print the two characters for
mcr p15, 0, r5, c13, c0, 0 @ PID
mcr p15, 0, r6, c3, c0, 0 @ Domain ID
mcr p15, 0, r7, c2, c0, 0 @ translation table base
+ mcr p15, 0, r8, c1, c1, 0 @ auxilliary control
#ifdef CONFIG_DEBUG_RESUME
mov r3, #'R'
#endif
ldr r2, =resume_with_mmu
- mcr p15, 0, r8, c1, c0, 0 @ turn on MMU, etc
+ mcr p15, 0, r9, c1, c0, 0 @ turn on MMU, etc
nop @ second-to-last before mmu
mov pc, r2 @ go back to virtual address