Fedora kernel-2.6.17-1.2142_FC4 patched with stable patch-2.6.17.4-vs2.0.2-rc26.diff

[linux-2.6.git] / arch / arm / mm / Kconfig

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 3fefb43..c55b739 100644 (file)
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -62,8 +62,8 @@ config CPU_ARM720T
 # ARM920T
 config CPU_ARM920T
        bool "Support ARM920T processor" if !ARCH_S3C2410
-       depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX
-       default y if ARCH_S3C2410
+       depends on ARCH_EP93XX || ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200
+       default y if ARCH_S3C2410 || ARCH_AT91RM9200
        select CPU_32v4
        select CPU_ABRT_EV4T
        select CPU_CACHE_V4WT
@@ -83,8 +83,8 @@ config CPU_ARM920T
 # ARM922T
 config CPU_ARM922T
        bool "Support ARM922T processor" if ARCH_INTEGRATOR
-       depends on ARCH_CAMELOT || ARCH_LH7A40X || ARCH_INTEGRATOR
-       default y if ARCH_CAMELOT || ARCH_LH7A40X
+       depends on ARCH_LH7A40X || ARCH_INTEGRATOR
+       default y if ARCH_LH7A40X
        select CPU_32v4
        select CPU_ABRT_EV4T
        select CPU_CACHE_V4WT
@@ -101,9 +101,9 @@ config CPU_ARM922T
 
 # ARM925T
 config CPU_ARM925T
-       bool "Support ARM925T processor" if ARCH_OMAP
-       depends on ARCH_OMAP1510
-       default y if ARCH_OMAP1510
+       bool "Support ARM925T processor" if ARCH_OMAP1
+       depends on ARCH_OMAP15XX
+       default y if ARCH_OMAP15XX
        select CPU_32v4
        select CPU_ABRT_EV4T
        select CPU_CACHE_V4WT
@@ -120,8 +120,8 @@ config CPU_ARM925T
 
 # ARM926T
 config CPU_ARM926T
-       bool "Support ARM926T processor" if ARCH_INTEGRATOR
-       depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX
+       bool "Support ARM926T processor"
+       depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB
        default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX
        select CPU_32v5
        select CPU_ABRT_EV5TJ
@@ -239,10 +239,21 @@ config CPU_XSCALE
        select CPU_CACHE_VIVT
        select CPU_TLB_V4WBI
 
+# XScale Core Version 3
+config CPU_XSC3
+       bool
+       depends on ARCH_IXP23XX
+       default y
+       select CPU_32v5
+       select CPU_ABRT_EV5T
+       select CPU_CACHE_VIVT
+       select CPU_TLB_V4WBI
+       select IO_36
+
 # ARMv6
 config CPU_V6
        bool "Support ARM V6 processor"
-       depends on ARCH_INTEGRATOR
+       depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2
        select CPU_32v6
        select CPU_ABRT_EV6
        select CPU_CACHE_V6
@@ -250,16 +261,34 @@ config CPU_V6
        select CPU_COPY_V6
        select CPU_TLB_V6
 
+# ARMv6k
+config CPU_32v6K
+       bool "Support ARM V6K processor extensions" if !SMP
+       depends on CPU_V6
+       default y if SMP
+       help
+         Say Y here if your ARMv6 processor supports the 'K' extension.
+         This enables the kernel to use some instructions not present
+         on previous processors, and as such a kernel build with this
+         enabled will not boot on processors with do not support these
+         instructions.
+
 # Figure out what processor architecture version we should be using.
 # This defines the compiler instruction set which depends on the machine type.
 config CPU_32v3
        bool
+       select TLS_REG_EMUL if SMP
+       select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
 
 config CPU_32v4
        bool
+       select TLS_REG_EMUL if SMP
+       select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
 
 config CPU_32v5
        bool
+       select TLS_REG_EMUL if SMP
+       select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
 
 config CPU_32v6
        bool
@@ -343,11 +372,17 @@ config CPU_TLB_V4WBI
 config CPU_TLB_V6
        bool
 
+#
+# CPU supports 36-bit I/O
+#
+config IO_36
+       bool
+
 comment "Processor Features"
 
 config ARM_THUMB
        bool "Support Thumb user binaries"
-       depends on CPU_ARM720T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_V6
+       depends on CPU_ARM720T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_V6
        default y
        help
          Say Y if you want to include kernel support for running user space
@@ -370,21 +405,21 @@ config CPU_BIG_ENDIAN
 
 config CPU_ICACHE_DISABLE
        bool "Disable I-Cache"
-       depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020
+       depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_V6
        help
          Say Y here to disable the processor instruction cache. Unless
          you have a reason not to or are unsure, say N.
 
 config CPU_DCACHE_DISABLE
        bool "Disable D-Cache"
-       depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020
+       depends on CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_V6
        help
          Say Y here to disable the processor data cache. Unless
          you have a reason not to or are unsure, say N.
 
 config CPU_DCACHE_WRITETHROUGH
        bool "Force write through D-cache"
-       depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020) && !CPU_DISABLE_DCACHE
+       depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_V6) && !CPU_DCACHE_DISABLE
        default y if CPU_ARM925T
        help
          Say Y here to use the data cache in writethrough mode. Unless you
@@ -399,13 +434,12 @@ config CPU_CACHE_ROUND_ROBIN
 
 config CPU_BPREDICT_DISABLE
        bool "Disable branch prediction"
-       depends on CPU_ARM1020
+       depends on CPU_ARM1020 || CPU_V6
        help
          Say Y here to disable branch prediction.  If unsure, say N.
 
 config TLS_REG_EMUL
        bool
-       default y if SMP && (CPU_32v5 || CPU_32v4 || CPU_32v3)
        help
          An SMP system using a pre-ARMv6 processor (there are apparently
          a few prototypes like that in existence) and therefore access to
@@ -424,7 +458,6 @@ config HAS_TLS_REG
 
 config NEEDS_SYSCALL_FOR_CMPXCHG
        bool
-       default y if SMP && (CPU_32v5 || CPU_32v4 || CPU_32v3)
        help
          SMP on a pre-ARMv6 processor?  Well OK then.
          Forget about fast user space cmpxchg support.