linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / arch / arm / mm / cache-v4wb.S

diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S
index 2ebc1b3..5c4055b 100644 (file)
--- a/arch/arm/mm/cache-v4wb.S
+++ b/arch/arm/mm/cache-v4wb.S
@@ -7,9 +7,10 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#include <linux/config.h>
 #include <linux/linkage.h>
 #include <linux/init.h>
-#include <asm/memory.h>
+#include <asm/hardware.h>
 #include <asm/page.h>
 #include "proc-macros.S"
 
@@ -45,11 +46,6 @@
  */
 #define CACHE_DLIMIT   (CACHE_DSIZE * 4)
 
-       .data
-flush_base:
-       .long   FLUSH_BASE
-       .text
-
 /*
  *     flush_user_cache_all()
  *
@@ -67,21 +63,11 @@ ENTRY(v4wb_flush_kern_cache_all)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c5, 0           @ invalidate I cache
 __flush_whole_cache:
-       ldr     r3, =flush_base
-       ldr     r1, [r3, #0]
-       eor     r1, r1, #CACHE_DSIZE
-       str     r1, [r3, #0]
-       add     r2, r1, #CACHE_DSIZE
-1:     ldr     r3, [r1], #32
-       cmp     r1, r2
-       blo     1b
-#ifdef FLUSH_BASE_MINICACHE
-       add     r2, r2, #FLUSH_BASE_MINICACHE - FLUSH_BASE
-       sub     r1, r2, #512                    @ only 512 bytes
-1:     ldr     r3, [r1], #32
-       cmp     r1, r2
+       mov     r0, #FLUSH_BASE
+       add     r1, r0, #CACHE_DSIZE
+1:     ldr     r2, [r0], #32
+       cmp     r0, r1
        blo     1b
-#endif
        mcr     p15, 0, ip, c7, c10, 4          @ drain write buffer
        mov     pc, lr
 
@@ -96,7 +82,6 @@ __flush_whole_cache:
  *     - flags - vma_area_struct flags describing address space
  */
 ENTRY(v4wb_flush_user_cache_range)
-       mov     ip, #0
        sub     r3, r1, r0                      @ calculate total size
        tst     r2, #VM_EXEC                    @ executable region?
        mcrne   p15, 0, ip, c7, c5, 0           @ invalidate I cache