vserver 1.9.3

[linux-2.6.git] / arch / arm / mm / proc-arm1026.S

diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 0009f2d..38a06cb 100644 (file)
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -175,6 +175,18 @@ ENTRY(arm1026_flush_user_cache_range)
  *     - end   - virtual end address
  */
 ENTRY(arm1026_coherent_kern_range)
+       /* FALLTHROUGH */
+/*
+ *     coherent_user_range(start, end)
+ *
+ *     Ensure coherency between the Icache and the Dcache in the
+ *     region described by start.  If you have non-snooping
+ *     Harvard caches, you need to implement this function.
+ *
+ *     - start - virtual start address
+ *     - end   - virtual end address
+ */
+ENTRY(arm1026_coherent_user_range)
        mov     ip, #0
        bic     r0, r0, #CACHE_DLINESIZE - 1
 1:
@@ -286,6 +298,7 @@ ENTRY(arm1026_cache_fns)
        .long   arm1026_flush_user_cache_all
        .long   arm1026_flush_user_cache_range
        .long   arm1026_coherent_kern_range
+       .long   arm1026_coherent_user_range
        .long   arm1026_flush_kern_dcache_page
        .long   arm1026_dma_inv_range
        .long   arm1026_dma_clean_range
@@ -471,7 +484,7 @@ __arm1026_proc_info:
        b       __arm1026_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
-       .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_FAST_MULT
+       .long   HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_JAVA
        .long   cpu_arm1026_name
        .long   arm1026_processor_functions
        .long   v4wbi_tlb_fns