fedora core 6 1.2949 + vserver 2.2.0
[linux-2.6.git] / arch / arm / mm / proc-arm6_7.S
index 8e7e1e7..123a7dc 100644 (file)
@@ -2,6 +2,7 @@
  *  linux/arch/arm/mm/proc-arm6,7.S
  *
  *  Copyright (C) 1997-2000 Russell King
+ *  hacked for non-paged-MM by Hyok S. Choi, 2003.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -14,8 +15,9 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
+#include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
 ENTRY(cpu_arm6_dcache_clean_area)
@@ -198,21 +200,24 @@ ENTRY(cpu_arm7_do_idle)
  */
 ENTRY(cpu_arm6_switch_mm)
 ENTRY(cpu_arm7_switch_mm)
+#ifdef CONFIG_MMU
                mov     r1, #0
                mcr     p15, 0, r1, c7, c0, 0           @ flush cache
                mcr     p15, 0, r0, c2, c0, 0           @ update page table ptr
                mcr     p15, 0, r1, c5, c0, 0           @ flush TLBs
+#endif
                mov     pc, lr
 
 /*
- * Function: arm6_7_set_pte(pte_t *ptep, pte_t pte)
+ * Function: arm6_7_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext)
  * Params  : r0 = Address to set
  *        : r1 = value to set
  * Purpose : Set a PTE and flush it out of any WB cache
  */
                .align  5
-ENTRY(cpu_arm6_set_pte)
-ENTRY(cpu_arm7_set_pte)
+ENTRY(cpu_arm6_set_pte_ext)
+ENTRY(cpu_arm7_set_pte_ext)
+#ifdef CONFIG_MMU
                str     r1, [r0], #-2048                @ linux version
 
                eor     r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -231,6 +236,7 @@ ENTRY(cpu_arm7_set_pte)
                movne   r2, #0
 
                str     r2, [r0]                        @ hardware version
+#endif /* CONFIG_MMU */
                mov     pc, lr
 
 /*
@@ -242,7 +248,9 @@ ENTRY(cpu_arm6_reset)
 ENTRY(cpu_arm7_reset)
                mov     r1, #0
                mcr     p15, 0, r1, c7, c0, 0           @ flush cache
+#ifdef CONFIG_MMU
                mcr     p15, 0, r1, c5, c0, 0           @ flush TLB
+#endif
                mov     r1, #0x30
                mcr     p15, 0, r1, c1, c0, 0           @ turn off MMU etc
                mov     pc, r0
@@ -252,19 +260,27 @@ ENTRY(cpu_arm7_reset)
                .type   __arm6_setup, #function
 __arm6_setup:  mov     r0, #0
                mcr     p15, 0, r0, c7, c0              @ flush caches on v3
+#ifdef CONFIG_MMU
                mcr     p15, 0, r0, c5, c0              @ flush TLBs on v3
                mov     r0, #0x3d                       @ . ..RS BLDP WCAM
                orr     r0, r0, #0x100                  @ . ..01 0011 1101
+#else
+               mov     r0, #0x3c                       @ . ..RS BLDP WCA.
+#endif
                mov     pc, lr
                .size   __arm6_setup, . - __arm6_setup
 
                .type   __arm7_setup, #function
 __arm7_setup:  mov     r0, #0
                mcr     p15, 0, r0, c7, c0              @ flush caches on v3
+#ifdef CONFIG_MMU
                mcr     p15, 0, r0, c5, c0              @ flush TLBs on v3
                mcr     p15, 0, r0, c3, c0              @ load domain access register
                mov     r0, #0x7d                       @ . ..RS BLDP WCAM
                orr     r0, r0, #0x100                  @ . ..01 0111 1101
+#else
+               mov     r0, #0x7c                       @ . ..RS BLDP WCA.
+#endif
                mov     pc, lr
                .size   __arm7_setup, . - __arm7_setup
 
@@ -283,7 +299,7 @@ ENTRY(arm6_processor_functions)
                .word   cpu_arm6_do_idle
                .word   cpu_arm6_dcache_clean_area
                .word   cpu_arm6_switch_mm
-               .word   cpu_arm6_set_pte
+               .word   cpu_arm6_set_pte_ext
                .size   arm6_processor_functions, . - arm6_processor_functions
 
 /*
@@ -299,7 +315,7 @@ ENTRY(arm7_processor_functions)
                .word   cpu_arm7_do_idle
                .word   cpu_arm7_dcache_clean_area
                .word   cpu_arm7_switch_mm
-               .word   cpu_arm7_set_pte
+               .word   cpu_arm7_set_pte_ext
                .size   arm7_processor_functions, . - arm7_processor_functions
 
                .section ".rodata"
@@ -339,6 +355,10 @@ __arm6_proc_info:
                .long   0x41560600
                .long   0xfffffff0
                .long   0x00000c1e
+               .long   PMD_TYPE_SECT | \
+                       PMD_BIT4 | \
+                       PMD_SECT_AP_WRITE | \
+                       PMD_SECT_AP_READ
                b       __arm6_setup
                .long   cpu_arch_name
                .long   cpu_elf_name
@@ -355,6 +375,10 @@ __arm610_proc_info:
                .long   0x41560610
                .long   0xfffffff0
                .long   0x00000c1e
+               .long   PMD_TYPE_SECT | \
+                       PMD_BIT4 | \
+                       PMD_SECT_AP_WRITE | \
+                       PMD_SECT_AP_READ
                b       __arm6_setup
                .long   cpu_arch_name
                .long   cpu_elf_name
@@ -371,6 +395,10 @@ __arm7_proc_info:
                .long   0x41007000
                .long   0xffffff00
                .long   0x00000c1e
+               .long   PMD_TYPE_SECT | \
+                       PMD_BIT4 | \
+                       PMD_SECT_AP_WRITE | \
+                       PMD_SECT_AP_READ
                b       __arm7_setup
                .long   cpu_arch_name
                .long   cpu_elf_name
@@ -392,6 +420,10 @@ __arm710_proc_info:
                        PMD_BIT4 | \
                        PMD_SECT_AP_WRITE | \
                        PMD_SECT_AP_READ
+               .long   PMD_TYPE_SECT | \
+                       PMD_BIT4 | \
+                       PMD_SECT_AP_WRITE | \
+                       PMD_SECT_AP_READ
                b       __arm7_setup
                .long   cpu_arch_name
                .long   cpu_elf_name