linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / arch / arm / mm / proc-arm720.S

diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index c2f0705..a13e018 100644 (file)
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -4,7 +4,6 @@
  *  Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
  *                     Rob Scott (rscott@mtrob.fdns.net)
  *  Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
- *  hacked for non-paged-MM by Hyok S. Choi, 2004.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -30,18 +29,15 @@
  *                     out of 'proc-arm6,7.S' per RMK discussion
  *   07-25-2000 SJH    Added idle function.
  *   08-25-2000        DBS     Updated for integration of ARM Ltd version.
- *   04-20-2004 HSC    modified for non-paged memory management mode.
  */
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
-#include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
 #include <asm/procinfo.h>
 #include <asm/ptrace.h>
-
-#include "proc-macros.S"
+#include <asm/hardware.h>
 
 /*
  * Function: arm720_proc_init (void)
@@ -79,12 +75,10 @@ ENTRY(cpu_arm720_do_idle)
  *          the new.
  */
 ENTRY(cpu_arm720_switch_mm)
-#ifdef CONFIG_MMU
                mov     r1, #0
                mcr     p15, 0, r1, c7, c7, 0           @ invalidate cache
                mcr     p15, 0, r0, c2, c0, 0           @ update page table ptr
                mcr     p15, 0, r1, c8, c7, 0           @ flush TLB (v4)
-#endif
                mov     pc, lr
 
 /*
@@ -95,7 +89,6 @@ ENTRY(cpu_arm720_switch_mm)
  */
                .align  5
 ENTRY(cpu_arm720_set_pte)
-#ifdef CONFIG_MMU
                str     r1, [r0], #-2048                @ linux version
 
                eor     r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -114,7 +107,6 @@ ENTRY(cpu_arm720_set_pte)
                movne   r2, #0
 
                str     r2, [r0]                        @ hardware version
-#endif
                mov     pc, lr
 
 /*
@@ -125,9 +117,7 @@ ENTRY(cpu_arm720_set_pte)
 ENTRY(cpu_arm720_reset)
                mov     ip, #0
                mcr     p15, 0, ip, c7, c7, 0           @ invalidate cache
-#ifdef CONFIG_MMU
                mcr     p15, 0, ip, c8, c7, 0           @ flush TLB (v4)
-#endif
                mrc     p15, 0, ip, c1, c0, 0           @ get ctrl register
                bic     ip, ip, #0x000f                 @ ............wcam
                bic     ip, ip, #0x2100                 @ ..v....s........
@@ -140,9 +130,7 @@ ENTRY(cpu_arm720_reset)
 __arm710_setup:
        mov     r0, #0
        mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
-#ifdef CONFIG_MMU
        mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
-#endif
        mrc     p15, 0, r0, c1, c0              @ get control register
        ldr     r5, arm710_cr1_clear
        bic     r0, r0, r5
@@ -168,14 +156,12 @@ arm710_cr1_set:
 __arm720_setup:
        mov     r0, #0
        mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
-#ifdef CONFIG_MMU
        mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
-#endif
-       adr     r5, arm720_crval
-       ldmia   r5, {r5, r6}
        mrc     p15, 0, r0, c1, c0              @ get control register
+       ldr     r5, arm720_cr1_clear
        bic     r0, r0, r5
-       orr     r0, r0, r6
+       ldr     r5, arm720_cr1_set
+       orr     r0, r0, r5
        mov     pc, lr                          @ __ret (head.S)
        .size   __arm720_setup, . - __arm720_setup
 
@@ -185,9 +171,12 @@ __arm720_setup:
         * ..1. 1001 ..11 1101
         * 
         */
-       .type   arm720_crval, #object
-arm720_crval:
-       crval   clear=0x00002f3f, mmuset=0x0000213d, ucset=0x00000130
+       .type   arm720_cr1_clear, #object
+       .type   arm720_cr1_set, #object
+arm720_cr1_clear:
+       .word   0x2f3f
+arm720_cr1_set:
+       .word   0x213d
 
                __INITDATA
 
@@ -245,10 +234,6 @@ __arm710_proc_info:
                        PMD_BIT4 | \
                        PMD_SECT_AP_WRITE | \
                        PMD_SECT_AP_READ
-               .long   PMD_TYPE_SECT | \
-                       PMD_BIT4 | \
-                       PMD_SECT_AP_WRITE | \
-                       PMD_SECT_AP_READ
                b       __arm710_setup                          @ cpu_flush
                .long   cpu_arch_name                           @ arch_name
                .long   cpu_elf_name                            @ elf_name
@@ -270,10 +255,6 @@ __arm720_proc_info:
                        PMD_BIT4 | \
                        PMD_SECT_AP_WRITE | \
                        PMD_SECT_AP_READ
-               .long   PMD_TYPE_SECT | \
-                       PMD_BIT4 | \
-                       PMD_SECT_AP_WRITE | \
-                       PMD_SECT_AP_READ
                b       __arm720_setup                          @ cpu_flush
                .long   cpu_arch_name                           @ arch_name
                .long   cpu_elf_name                            @ elf_name