linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / arch / arm / mm / proc-arm926.S

diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 44a7a65..7d042dc 100644 (file)
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -3,7 +3,6 @@
  *
  *  Copyright (C) 1999-2001 ARM Limited
  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
- *  hacked for non-paged-MM by Hyok S. Choi, 2003.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -26,11 +25,12 @@
  *  CONFIG_CPU_ARM926_CPU_IDLE -> nohlt
  */
 #include <linux/linkage.h>
+#include <linux/config.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
-#include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
 #include <asm/procinfo.h>
+#include <asm/hardware.h>
 #include <asm/page.h>
 #include <asm/ptrace.h>
 #include "proc-macros.S"
@@ -85,9 +85,7 @@ ENTRY(cpu_arm926_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
        mcr     p15, 0, ip, c7, c10, 4          @ drain WB
-#ifdef CONFIG_MMU
        mcr     p15, 0, ip, c8, c7, 0           @ invalidate I & D TLBs
-#endif
        mrc     p15, 0, ip, c1, c0, 0           @ ctrl register
        bic     ip, ip, #0x000f                 @ ............wcam
        bic     ip, ip, #0x1100                 @ ...i...s........
@@ -331,7 +329,6 @@ ENTRY(cpu_arm926_dcache_clean_area)
  */
        .align  5
 ENTRY(cpu_arm926_switch_mm)
-#ifdef CONFIG_MMU
        mov     ip, #0
 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
        mcr     p15, 0, ip, c7, c6, 0           @ invalidate D cache
@@ -344,7 +341,6 @@ ENTRY(cpu_arm926_switch_mm)
        mcr     p15, 0, ip, c7, c10, 4          @ drain WB
        mcr     p15, 0, r0, c2, c0, 0           @ load page table pointer
        mcr     p15, 0, ip, c8, c7, 0           @ invalidate I & D TLBs
-#endif
        mov     pc, lr
 
 /*
@@ -354,7 +350,6 @@ ENTRY(cpu_arm926_switch_mm)
  */
        .align  5
 ENTRY(cpu_arm926_set_pte)
-#ifdef CONFIG_MMU
        str     r1, [r0], #-2048                @ linux version
 
        eor     r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -383,7 +378,6 @@ ENTRY(cpu_arm926_set_pte)
        mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
 #endif
        mcr     p15, 0, r0, c7, c10, 4          @ drain WB
-#endif
        mov     pc, lr
 
        __INIT
@@ -393,9 +387,7 @@ __arm926_setup:
        mov     r0, #0
        mcr     p15, 0, r0, c7, c7              @ invalidate I,D caches on v4
        mcr     p15, 0, r0, c7, c10, 4          @ drain write buffer on v4
-#ifdef CONFIG_MMU
        mcr     p15, 0, r0, c8, c7              @ invalidate I,D TLBs on v4
-#endif
 
 
 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
@@ -403,11 +395,11 @@ __arm926_setup:
        mcr     p15, 7, r0, c15, c0, 0
 #endif 
 
-       adr     r5, arm926_crval
-       ldmia   r5, {r5, r6}
        mrc     p15, 0, r0, c1, c0              @ get control register v4
+       ldr     r5, arm926_cr1_clear
        bic     r0, r0, r5
-       orr     r0, r0, r6
+       ldr     r5, arm926_cr1_set
+       orr     r0, r0, r5
 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
        orr     r0, r0, #0x4000                 @ .1.. .... .... ....
 #endif
@@ -420,9 +412,12 @@ __arm926_setup:
         * .011 0001 ..11 0101
         * 
         */
-       .type   arm926_crval, #object
-arm926_crval:
-       crval   clear=0x00007f3f, mmuset=0x00003135, ucset=0x00001134
+       .type   arm926_cr1_clear, #object
+       .type   arm926_cr1_set, #object
+arm926_cr1_clear:
+       .word   0x7f3f
+arm926_cr1_set:
+       .word   0x3135
 
        __INITDATA
 
@@ -456,7 +451,22 @@ cpu_elf_name:
 
        .type   cpu_arm926_name, #object
 cpu_arm926_name:
-       .asciz  "ARM926EJ-S"
+       .ascii  "ARM926EJ-S"
+#ifndef CONFIG_CPU_ICACHE_DISABLE
+       .ascii  "i"
+#endif
+#ifndef CONFIG_CPU_DCACHE_DISABLE
+       .ascii  "d"
+#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
+       .ascii  "(wt)"
+#else
+       .ascii  "(wb)"
+#endif
+#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
+       .ascii  "RR"
+#endif
+#endif
+       .ascii  "\0"
        .size   cpu_arm926_name, . - cpu_arm926_name
 
        .align
@@ -473,14 +483,10 @@ __arm926_proc_info:
                PMD_BIT4 | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
-       .long   PMD_TYPE_SECT | \
-               PMD_BIT4 | \
-               PMD_SECT_AP_WRITE | \
-               PMD_SECT_AP_READ
        b       __arm926_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
-       .long   HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_VFP|HWCAP_EDSP|HWCAP_JAVA
+       .long   HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_JAVA
        .long   cpu_arm926_name
        .long   arm926_processor_functions
        .long   v4wbi_tlb_fns