Fedora kernel-2.6.17-1.2142_FC4 patched with stable patch-2.6.17.4-vs2.0.2-rc26.diff

[linux-2.6.git] / arch / i386 / kernel / cpu / mcheck / p6.c

diff --git a/arch/i386/kernel/cpu/mcheck/p6.c b/arch/i386/kernel/cpu/mcheck/p6.c
index 46640f8..deeae42 100644 (file)
--- a/arch/i386/kernel/cpu/mcheck/p6.c
+++ b/arch/i386/kernel/cpu/mcheck/p6.c
@@ -6,7 +6,6 @@
 #include <linux/init.h>
 #include <linux/types.h>
 #include <linux/kernel.h>
-#include <linux/irq.h>
 #include <linux/interrupt.h>
 #include <linux/smp.h>
 
@@ -80,7 +79,7 @@ static fastcall void intel_machine_check(struct pt_regs * regs, long error_code)
 }
 
 /* Set up machine check reporting for processors with Intel style MCE */
-void __init intel_p6_mcheck_init(struct cpuinfo_x86 *c)
+void intel_p6_mcheck_init(struct cpuinfo_x86 *c)
 {
        u32 l, h;
        int i;
@@ -103,11 +102,16 @@ void __init intel_p6_mcheck_init(struct cpuinfo_x86 *c)
                wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
        nr_mce_banks = l & 0xff;
 
-       /* Don't enable bank 0 on intel P6 cores, it goes bang quickly. */
-       for (i=1; i<nr_mce_banks; i++) {
+       /*
+        * Following the example in IA-32 SDM Vol 3:
+        * - MC0_CTL should not be written
+        * - Status registers on all banks should be cleared on reset
+        */
+       for (i=1; i<nr_mce_banks; i++)
                wrmsr (MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
+
+       for (i=0; i<nr_mce_banks; i++)
                wrmsr (MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);
-       }
 
        set_in_cr4 (X86_CR4_MCE);
        printk (KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n",