#include <linux/mm.h>
#include <linux/cache.h>
#include <linux/delay.h>
-#include <linux/cache.h>
#include <linux/efi.h>
#include <asm/atomic.h>
/* This needs to be cacheline aligned because it is written to by *other* CPUs. */
static DEFINE_PER_CPU(u64, ipi_operation) ____cacheline_aligned;
+extern void cpu_halt (void);
+
+void
+lock_ipi_calllock(void)
+{
+ spin_lock_irq(&call_lock);
+}
+
+void
+unlock_ipi_calllock(void)
+{
+ spin_unlock_irq(&call_lock);
+}
+
static void
stop_this_cpu (void)
{
- extern void cpu_halt (void);
/*
* Remove this CPU:
*/
cpu_halt();
}
+void
+cpu_die(void)
+{
+ max_xtp();
+ local_irq_disable();
+ cpu_halt();
+ /* Should never be here */
+ BUG();
+ for (;;);
+}
+
irqreturn_t
handle_IPI (int irq, void *dev_id, struct pt_regs *regs)
{
if (!cpus)
return 0;
+ /* Can deadlock when called with interrupts disabled */
+ WARN_ON(irqs_disabled());
+
data.func = func;
data.info = info;
atomic_set(&data.started, 0);