* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1999,2001-2003 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 1999,2001-2004 Silicon Graphics, Inc. All rights reserved.
*/
#include <linux/config.h>
#include <linux/compiler.h>
#include <linux/sched.h>
#include <linux/root_dev.h>
+#include <linux/nodemask.h>
#include <asm/io.h>
#include <asm/sal.h>
#include <asm/machvec.h>
#include <asm/system.h>
#include <asm/processor.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/io.h>
#include <asm/sn/arch.h>
#include <asm/sn/addrs.h>
#include <asm/sn/pda.h>
#include <asm/sn/nodepda.h>
#include <asm/sn/sn_cpuid.h>
-#include <asm/sn/sn_private.h>
#include <asm/sn/simulator.h>
#include <asm/sn/leds.h>
#include <asm/sn/bte.h>
+#include <asm/sn/shub_mmr.h>
#include <asm/sn/clksupport.h>
#include <asm/sn/sn_sal.h>
-#include <asm/sn/sn2/shub.h>
+#include <asm/sn/geo.h>
+#include "xtalk/xwidgetdev.h"
+#include "xtalk/hubdev.h"
+#include <asm/sn/klconfig.h>
+
DEFINE_PER_CPU(struct pda_s, pda_percpu);
-#define MAX_PHYS_MEMORY (1UL << 49) /* 1 TB */
+#define MAX_PHYS_MEMORY (1UL << 49) /* 1 TB */
+
+lboard_t *root_lboard[MAX_COMPACT_NODES];
+
+extern void bte_init_node(nodepda_t *, cnodeid_t);
-extern void bte_init_node (nodepda_t *, cnodeid_t);
extern void sn_timer_init(void);
extern unsigned long last_time_offset;
-extern void init_platform_hubinfo(nodepda_t **nodepdaindr);
-extern void (*ia64_mark_idle)(int);
+extern void (*ia64_mark_idle) (int);
extern void snidle(int);
extern unsigned char acpi_kbd_controller_present;
-
-unsigned long sn_rtc_cycles_per_second;
+unsigned long sn_rtc_cycles_per_second;
EXPORT_SYMBOL(sn_rtc_cycles_per_second);
partid_t sn_partid = -1;
+EXPORT_SYMBOL(sn_partid);
char sn_system_serial_number_string[128];
+EXPORT_SYMBOL(sn_system_serial_number_string);
u64 sn_partition_serial_number;
+EXPORT_SYMBOL(sn_partition_serial_number);
short physical_node_map[MAX_PHYSNODE_ID];
EXPORT_SYMBOL(physical_node_map);
-int numionodes;
-/*
- * This is the address of the RRegs in the HSpace of the global
- * master. It is used by a hack in serial.c (serial_[in|out],
- * printk.c (early_printk), and kdb_io.c to put console output on that
- * node's Bedrock UART. It is initialized here to 0, so that
- * early_printk won't try to access the UART before
- * master_node_bedrock_address is properly calculated.
- */
-u64 master_node_bedrock_address;
+int numionodes;
static void sn_init_pdas(char **);
static void scan_for_ionodes(void);
-
-static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
-
-irqpda_t *irqpdaindr;
-
+static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
/*
* The format of "screen_info" is strange, and due to early i386-setup
* VGA color display.
*/
struct screen_info sn_screen_info = {
- .orig_x = 0,
- .orig_y = 0,
- .orig_video_mode = 3,
- .orig_video_cols = 80,
- .orig_video_ega_bx = 3,
- .orig_video_lines = 25,
- .orig_video_isVGA = 1,
- .orig_video_points = 16
+ .orig_x = 0,
+ .orig_y = 0,
+ .orig_video_mode = 3,
+ .orig_video_cols = 80,
+ .orig_video_ega_bx = 3,
+ .orig_video_lines = 25,
+ .orig_video_isVGA = 1,
+ .orig_video_points = 16
};
/*
* is sufficient (the IDE driver will autodetect the drive geometry).
*/
#ifdef CONFIG_IA64_GENERIC
-extern char drive_info[4*16];
+extern char drive_info[4 * 16];
#else
-char drive_info[4*16];
+char drive_info[4 * 16];
#endif
+/*
+ * Get nasid of current cpu early in boot before nodepda is initialized
+ */
+static int
+boot_get_nasid(void)
+{
+ int nasid;
+
+ if (ia64_sn_get_sapic_info(get_sapicid(), &nasid, NULL, NULL))
+ BUG();
+ return nasid;
+}
+
/*
* This routine can only be used during init, since
* smp_boot_data is an init data structure.
* may not be initialized yet.
*/
-static int __init
-pxm_to_nasid(int pxm)
+static int __init pxm_to_nasid(int pxm)
{
int i;
int nid;
}
return -1;
}
+
/**
* early_sn_setup - early setup routine for SN platforms
*
* for bringup. See start_kernel() in init/main.c.
*/
-void __init
-early_sn_setup(void)
+void __init early_sn_setup(void)
{
- void ia64_sal_handler_init (void *entry_point, void *gpval);
- efi_system_table_t *efi_systab;
- efi_config_table_t *config_tables;
- struct ia64_sal_systab *sal_systab;
- struct ia64_sal_desc_entry_point *ep;
- char *p;
- int i;
+ efi_system_table_t *efi_systab;
+ efi_config_table_t *config_tables;
+ struct ia64_sal_systab *sal_systab;
+ struct ia64_sal_desc_entry_point *ep;
+ char *p;
+ int i, j;
/*
* Parse enough of the SAL tables to locate the SAL entry point. Since, console
* This code duplicates some of the ACPI table parsing that is in efi.c & sal.c.
* Any changes to those file may have to be made hereas well.
*/
- efi_systab = (efi_system_table_t*)__va(ia64_boot_param->efi_systab);
+ efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab);
config_tables = __va(efi_systab->tables);
for (i = 0; i < efi_systab->nr_tables; i++) {
- if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) == 0) {
+ if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) ==
+ 0) {
sal_systab = __va(config_tables[i].table);
- p = (char*)(sal_systab+1);
- for (i = 0; i < sal_systab->entry_count; i++) {
+ p = (char *)(sal_systab + 1);
+ for (j = 0; j < sal_systab->entry_count; j++) {
if (*p == SAL_DESC_ENTRY_POINT) {
- ep = (struct ia64_sal_desc_entry_point *) p;
- ia64_sal_handler_init(__va(ep->sal_proc), __va(ep->gp));
- break;
+ ep = (struct ia64_sal_desc_entry_point
+ *)p;
+ ia64_sal_handler_init(__va
+ (ep->sal_proc),
+ __va(ep->gp));
+ return;
}
p += SAL_DESC_SIZE(*p);
}
}
}
-
- if ( IS_RUNNING_ON_SIMULATOR() ) {
- master_node_bedrock_address = (u64)REMOTE_HUB(get_nasid(), SH_JUNK_BUS_UART0);
- printk(KERN_DEBUG "early_sn_setup: setting master_node_bedrock_address to 0x%lx\n", master_node_bedrock_address);
- }
+ /* Uh-oh, SAL not available?? */
+ printk(KERN_ERR "failed to find SAL entry point\n");
}
extern int platform_intr_list[];
extern nasid_t master_nasid;
static int shub_1_1_found __initdata;
-
/*
* sn_check_for_wars
*
* Set flag for enabling shub specific wars
*/
-static inline int __init
-is_shub_1_1(int nasid)
+static inline int __init is_shub_1_1(int nasid)
{
unsigned long id;
- int rev;
+ int rev;
- id = REMOTE_HUB_L(nasid, SH_SHUB_ID);
- rev = (id & SH_SHUB_ID_REVISION_MASK) >> SH_SHUB_ID_REVISION_SHFT;
+ if (is_shub2())
+ return 0;
+ id = REMOTE_HUB_L(nasid, SH1_SHUB_ID);
+ rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT;
return rev <= 2;
}
-static void __init
-sn_check_for_wars(void)
-{
- int cnode;
-
- for (cnode=0; cnode< numnodes; cnode++)
- if (is_shub_1_1(cnodeid_to_nasid(cnode)))
- shub_1_1_found = 1;
-}
-
-/**
- * sn_set_error_handling_features - Tell the SN prom how to handle certain
- * error types.
- */
-static void __init
-sn_set_error_handling_features(void)
+static void __init sn_check_for_wars(void)
{
- u64 ret;
- u64 sn_ehf_bits[7]; /* see ia64_sn_set_error_handling_features */
- memset(sn_ehf_bits, 0, sizeof(sn_ehf_bits));
-#define EHF(x) __set_bit(SN_SAL_EHF_ ## x, sn_ehf_bits)
- EHF(MCA_SLV_TO_OS_INIT_SLV);
- EHF(NO_RZ_TLBC);
- // Uncomment once Jesse's code goes in - EHF(NO_RZ_IO_READ);
-#undef EHF
- ret = ia64_sn_set_error_handling_features(sn_ehf_bits);
- if (ret)
- printk(KERN_ERR "%s: failed, return code %ld\n", __FUNCTION__, ret);
+ int cnode;
+
+ if (is_shub2()) {
+ /* none yet */
+ } else {
+ for_each_online_node(cnode) {
+ if (is_shub_1_1(cnodeid_to_nasid(cnode)))
+ shub_1_1_found = 1;
+ }
+ }
}
/**
* the RTC frequency (via a SAL call), initializing secondary CPUs, and
* setting up per-node data areas. The console is also initialized here.
*/
-void __init
-sn_setup(char **cmdline_p)
+void __init sn_setup(char **cmdline_p)
{
long status, ticks_per_sec, drift;
int pxm;
int major = sn_sal_rev_major(), minor = sn_sal_rev_minor();
- extern nasid_t snia_get_master_baseio_nasid(void);
extern void sn_cpu_init(void);
- extern nasid_t snia_get_console_nasid(void);
/*
* If the generic code has enabled vga console support - lets
conswitchp = &dummy_con;
#else
conswitchp = NULL;
-#endif /* CONFIG_DUMMY_CONSOLE */
+#endif /* CONFIG_DUMMY_CONSOLE */
}
-#endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
+#endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY;
memset(physical_node_map, -1, sizeof(physical_node_map));
- for (pxm=0; pxm<MAX_PXM_DOMAINS; pxm++)
+ for (pxm = 0; pxm < MAX_PXM_DOMAINS; pxm++)
if (pxm_to_nid_map[pxm] != -1)
- physical_node_map[pxm_to_nasid(pxm)] = pxm_to_nid_map[pxm];
-
+ physical_node_map[pxm_to_nasid(pxm)] =
+ pxm_to_nid_map[pxm];
/*
* Old PROMs do not provide an ACPI FADT. Disable legacy keyboard
panic("PROM version too old\n");
}
- master_nasid = get_nasid();
- (void)snia_get_console_nasid();
- (void)snia_get_master_baseio_nasid();
+ master_nasid = boot_get_nasid();
- status = ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec, &drift);
+ status =
+ ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec,
+ &drift);
if (status != 0 || ticks_per_sec < 100000) {
- printk(KERN_WARNING "unable to determine platform RTC clock frequency, guessing.\n");
+ printk(KERN_WARNING
+ "unable to determine platform RTC clock frequency, guessing.\n");
/* PROM gives wrong value for clock freq. so guess */
- sn_rtc_cycles_per_second = 1000000000000UL/30000UL;
- }
- else
+ sn_rtc_cycles_per_second = 1000000000000UL / 30000UL;
+ } else
sn_rtc_cycles_per_second = ticks_per_sec;
platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR;
-
- if ( IS_RUNNING_ON_SIMULATOR() )
- {
- master_node_bedrock_address = (u64)REMOTE_HUB(get_nasid(), SH_JUNK_BUS_UART0);
- printk(KERN_DEBUG "sn_setup: setting master_node_bedrock_address to 0x%lx\n",
- master_node_bedrock_address);
- }
-
- /* Tell the prom how to handle certain error types */
- sn_set_error_handling_features();
-
/*
* we set the default root device to /dev/hda
* to make simulation easy
*/
sn_cpu_init();
- /*
- * Setup hubinfo stuff. Has to happen AFTER sn_cpu_init(),
- * because it uses the cnode to nasid tables.
- */
- init_platform_hubinfo(nodepdaindr);
-
#ifdef CONFIG_SMP
init_smp_config();
#endif
*
* One time setup for Node Data Area. Called by sn_setup().
*/
-void __init
-sn_init_pdas(char **cmdline_p)
+static void __init sn_init_pdas(char **cmdline_p)
{
- cnodeid_t cnode;
+ cnodeid_t cnode;
- memset(pda->cnodeid_to_nasid_table, -1, sizeof(pda->cnodeid_to_nasid_table));
- for (cnode=0; cnode<numnodes; cnode++)
- pda->cnodeid_to_nasid_table[cnode] = pxm_to_nasid(nid_to_pxm_map[cnode]);
+ memset(pda->cnodeid_to_nasid_table, -1,
+ sizeof(pda->cnodeid_to_nasid_table));
+ for_each_online_node(cnode)
+ pda->cnodeid_to_nasid_table[cnode] =
+ pxm_to_nasid(nid_to_pxm_map[cnode]);
- numionodes = numnodes;
+ numionodes = num_online_nodes();
scan_for_ionodes();
- /*
- * Allocate & initalize the nodepda for each node.
- */
- for (cnode=0; cnode < numnodes; cnode++) {
- nodepdaindr[cnode] = alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t));
+ /*
+ * Allocate & initalize the nodepda for each node.
+ */
+ for_each_online_node(cnode) {
+ nodepdaindr[cnode] =
+ alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t));
memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
- }
+ memset(nodepdaindr[cnode]->phys_cpuid, -1,
+ sizeof(nodepdaindr[cnode]->phys_cpuid));
+ }
/*
- * Now copy the array of nodepda pointers to each nodepda.
+ * Allocate & initialize nodepda for TIOs. For now, put them on node 0.
*/
- for (cnode=0; cnode < numionodes; cnode++)
- memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr, sizeof(nodepdaindr));
+ for (cnode = num_online_nodes(); cnode < numionodes; cnode++) {
+ nodepdaindr[cnode] =
+ alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t));
+ memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
+ }
+ /*
+ * Now copy the array of nodepda pointers to each nodepda.
+ */
+ for (cnode = 0; cnode < numionodes; cnode++)
+ memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr,
+ sizeof(nodepdaindr));
/*
* Set up IO related platform-dependent nodepda fields.
* The following routine actually sets up the hubinfo struct
* in nodepda.
*/
- for (cnode = 0; cnode < numnodes; cnode++) {
- init_platform_nodepda(nodepdaindr[cnode], cnode);
- bte_init_node (nodepdaindr[cnode], cnode);
+ for_each_online_node(cnode) {
+ bte_init_node(nodepdaindr[cnode], cnode);
+ }
+
+ /*
+ * Initialize the per node hubdev. This includes IO Nodes and
+ * headless/memless nodes.
+ */
+ for (cnode = 0; cnode < numionodes; cnode++) {
+ hubdev_init_node(nodepdaindr[cnode], cnode);
}
}
* Also sets up a few fields in the nodepda. Also known as
* platform_cpu_init() by the ia64 machvec code.
*/
-void __init
-sn_cpu_init(void)
+void __init sn_cpu_init(void)
{
- int cpuid;
- int cpuphyid;
- int nasid;
- int slice;
- int cnode;
- static int wars_have_been_checked;
+ int cpuid;
+ int cpuphyid;
+ int nasid;
+ int subnode;
+ int slice;
+ int cnode;
+ int i;
+ u64 shubtype, nasid_bitmask, nasid_shift;
+ static int wars_have_been_checked;
+
+ memset(pda, 0, sizeof(pda));
+ if (ia64_sn_get_hub_info(0, &shubtype, &nasid_bitmask, &nasid_shift))
+ BUG();
+ pda->shub2 = (u8)shubtype;
+ pda->nasid_bitmask = (u16)nasid_bitmask;
+ pda->nasid_shift = (u8)nasid_shift;
+ pda->as_shift = pda->nasid_shift - 2;
/*
* The boot cpu makes this call again after platform initialization is
return;
cpuid = smp_processor_id();
- cpuphyid = ((ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff);
- nasid = cpu_physical_id_to_nasid(cpuphyid);
+ cpuphyid = get_sapicid();
+
+ if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))
+ BUG();
+
+ for (i=0; i < MAX_NUMNODES; i++) {
+ if (nodepdaindr[i]) {
+ nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid;
+ nodepdaindr[i]->phys_cpuid[cpuid].slice = slice;
+ nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode;
+ }
+ }
+
cnode = nasid_to_cnodeid(nasid);
- slice = cpu_physical_id_to_slice(cpuphyid);
- memset(pda, 0, sizeof(pda));
pda->p_nodepda = nodepdaindr[cnode];
- pda->led_address = (typeof(pda->led_address)) (LED0 + (slice<<LED_CPU_SHIFT));
+ pda->led_address =
+ (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
pda->led_state = LED_ALWAYS_SET;
- pda->hb_count = HZ/2;
+ pda->hb_count = HZ / 2;
pda->hb_state = 0;
pda->idle_flag = 0;
- if (cpuid != 0){
- memcpy(pda->cnodeid_to_nasid_table, pdacpu(0)->cnodeid_to_nasid_table,
- sizeof(pda->cnodeid_to_nasid_table));
+ if (cpuid != 0) {
+ memcpy(pda->cnodeid_to_nasid_table,
+ pdacpu(0)->cnodeid_to_nasid_table,
+ sizeof(pda->cnodeid_to_nasid_table));
}
/*
wars_have_been_checked = 1;
}
pda->shub_1_1_found = shub_1_1_found;
-
/*
- * We must use different memory allocators for first cpu (bootmem
- * allocator) than for the other cpus (regular allocator).
+ * Set up addresses of PIO/MEM write status registers.
*/
- if (cpuid == 0)
- irqpdaindr = alloc_bootmem_node(NODE_DATA(cpuid_to_cnodeid(cpuid)),sizeof(irqpda_t));
-
- memset(irqpdaindr, 0, sizeof(irqpda_t));
- irqpdaindr->irq_flags[SGI_PCIBR_ERROR] = SN2_IRQ_SHARED;
- irqpdaindr->irq_flags[SGI_PCIBR_ERROR] |= SN2_IRQ_RESERVED;
- irqpdaindr->irq_flags[SGI_II_ERROR] = SN2_IRQ_SHARED;
- irqpdaindr->irq_flags[SGI_II_ERROR] |= SN2_IRQ_RESERVED;
-
- pda->pio_write_status_addr = (volatile unsigned long *)
- LOCAL_MMR_ADDR((slice < 2 ? SH_PIO_WRITE_STATUS_0 : SH_PIO_WRITE_STATUS_1 ) );
- pda->mem_write_status_addr = (volatile u64 *)
- LOCAL_MMR_ADDR((slice < 2 ? SH_MEMORY_WRITE_STATUS_0 : SH_MEMORY_WRITE_STATUS_1 ) );
-
- if (local_node_data->active_cpu_count++ == 0) {
- int buddy_nasid;
- buddy_nasid = cnodeid_to_nasid(numa_node_id() == numnodes-1 ? 0 : numa_node_id()+ 1);
- pda->pio_shub_war_cam_addr = (volatile unsigned long*)GLOBAL_MMR_ADDR(nasid, SH_PI_CAM_CONTROL);
+ {
+ u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
+ u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_1,
+ SH2_PIO_WRITE_STATUS_2, SH2_PIO_WRITE_STATUS_3};
+ u64 *pio;
+ pio = is_shub1() ? pio1 : pio2;
+ pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]);
+ pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0;
+ }
+
+ /*
+ * WAR addresses for SHUB 1.x.
+ */
+ if (local_node_data->active_cpu_count++ == 0 && is_shub1()) {
+ int buddy_nasid;
+ buddy_nasid =
+ cnodeid_to_nasid(numa_node_id() ==
+ num_online_nodes() - 1 ? 0 : numa_node_id() + 1);
+ pda->pio_shub_war_cam_addr =
+ (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid,
+ SH1_PI_CAM_CONTROL);
}
}
* physical_node_map and the pda and increment numionodes.
*/
-static void __init
-scan_for_ionodes(void)
+static void __init scan_for_ionodes(void)
{
int nasid = 0;
lboard_t *brd;
/* Setup ionodes with memory */
- for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid +=2) {
- u64 klgraph_header;
+ for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
+ char *klgraph_header;
cnodeid_t cnodeid;
- if (physical_node_map[nasid] == -1)
+ if (physical_node_map[nasid] == -1)
continue;
- klgraph_header = cnodeid = -1;
- klgraph_header = ia64_sn_get_klconfig_addr(nasid);
- if (klgraph_header <= 0) {
- if ( IS_RUNNING_ON_SIMULATOR() )
+ cnodeid = -1;
+ klgraph_header = __va(ia64_sn_get_klconfig_addr(nasid));
+ if (!klgraph_header) {
+ if (IS_RUNNING_ON_SIMULATOR())
continue;
- BUG(); /* All nodes must have klconfig tables! */
+ BUG(); /* All nodes must have klconfig tables! */
}
cnodeid = nasid_to_cnodeid(nasid);
root_lboard[cnodeid] = (lboard_t *)
- NODE_OFFSET_TO_LBOARD( (nasid),
- ((kl_config_hdr_t *)(klgraph_header))->
- ch_board_info);
+ NODE_OFFSET_TO_LBOARD((nasid),
+ ((kl_config_hdr_t
+ *) (klgraph_header))->
+ ch_board_info);
}
/* Scan headless/memless IO Nodes. */
- for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid +=2) {
+ for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
/* if there's no nasid, don't try to read the klconfig on the node */
- if (physical_node_map[nasid] == -1) continue;
- brd = find_lboard_any((lboard_t *)root_lboard[nasid_to_cnodeid(nasid)], KLTYPE_SNIA);
+ if (physical_node_map[nasid] == -1)
+ continue;
+ brd = find_lboard_any((lboard_t *)
+ root_lboard[nasid_to_cnodeid(nasid)],
+ KLTYPE_SNIA);
if (brd) {
- brd = KLCF_NEXT_ANY(brd); /* Skip this node's lboard */
+ brd = KLCF_NEXT_ANY(brd); /* Skip this node's lboard */
if (!brd)
continue;
}
brd = find_lboard_any(brd, KLTYPE_SNIA);
+
while (brd) {
- pda->cnodeid_to_nasid_table[numionodes] = brd->brd_nasid;
+ pda->cnodeid_to_nasid_table[numionodes] =
+ brd->brd_nasid;
physical_node_map[brd->brd_nasid] = numionodes;
root_lboard[numionodes] = brd;
numionodes++;
brd = find_lboard_any(brd, KLTYPE_SNIA);
}
}
+
+ /* Scan for TIO nodes. */
+ for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
+ /* if there's no nasid, don't try to read the klconfig on the node */
+ if (physical_node_map[nasid] == -1)
+ continue;
+ brd = find_lboard_any((lboard_t *)
+ root_lboard[nasid_to_cnodeid(nasid)],
+ KLTYPE_TIO);
+ while (brd) {
+ pda->cnodeid_to_nasid_table[numionodes] =
+ brd->brd_nasid;
+ physical_node_map[brd->brd_nasid] = numionodes;
+ root_lboard[numionodes] = brd;
+ numionodes++;
+ brd = KLCF_NEXT_ANY(brd);
+ if (!brd)
+ break;
+
+ brd = find_lboard_any(brd, KLTYPE_TIO);
+ }
+ }
+
+}
+
+int
+nasid_slice_to_cpuid(int nasid, int slice)
+{
+ long cpu;
+
+ for (cpu=0; cpu < NR_CPUS; cpu++)
+ if (nodepda->phys_cpuid[cpu].nasid == nasid && nodepda->phys_cpuid[cpu].slice == slice)
+ return cpu;
+
+ return -1;
}
git://git.onelab.eu / linux-2.6.git / blobdiff