only select this option if you have hardware that actually has a
64-bit processor and if your application will actually benefit from
64-bit processing, otherwise say N. You must say Y for kernels for
- SGI IP27 (Origin 200 and 2000). If in doubt say N.
+ SGI IP27 (Origin 200 and 2000) and SGI IP32 (O2). If in doubt say N.
config 64BIT
def_bool MIPS64
config MACH_JAZZ
bool "Support for the Jazz family of machines"
+ select ARC
+ select ARC32
+ select GENERIC_ISA_DMA
+ select I8259
select ISA
help
This a family of machines based on the MIPS R4030 chipset which was
the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
<http://www.linux-mips.org/>.
-config BAGET_MIPS
- bool "Support for BAGET MIPS series (EXPERIMENTAL)"
- depends on MIPS32 && EXPERIMENTAL
- help
- This enables support for the Baget, a Russian embedded system. For
- more details about the Baget see the Linux/MIPS FAQ on
- <http://www.linux-mips.org/>.
-
config MACH_VR41XX
bool "Support for NEC VR41XX-based machines"
+config NEC_CMBVR4133
+ bool "Support for NEC CMB-VR4133"
+ depends on MACH_VR41XX
+ select CPU_VR41XX
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select HW_HAS_PCI
+ select PCI_VR41XX
+
+config ROCKHOPPER
+ bool "Support for Rockhopper baseboard"
+ depends on NEC_CMBVR4133
+ select I8259
+ select HAVE_STD_PC_SERIAL_PORT
+
config CASIO_E55
bool "Support for CASIO CASSIOPEIA E-10/15/55/65"
depends on MACH_VR41XX
The TANBAC TB0229 (VR4131DIMM) is a MIPS-based platform manufactured by TANBAC.
Please refer to <http://www.tanbac.co.jp/> about VR4131DIMM.
+config TANBAC_TB0219
+ bool "Added TANBAC TB0219 Base board support"
+ depends on TANBAC_TB0229
+
config VICTOR_MPC30X
bool "Support for Victor MP-C303/304"
select DMA_NONCOHERENT
depends on MIPS32
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select SWAP_IO_SPACE
config MIPS_COBALT
bool "Support for Cobalt Server (EXPERIMENTAL)"
depends on EXPERIMENTAL
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select I8259
select IRQ_CPU
config MACH_DECSTATION
bool "Support for DECstations"
+ select BOOT_ELF32
select DMA_NONCOHERENT
select IRQ_CPU
depends on MIPS32 || EXPERIMENTAL
depends on EXPERIMENTAL
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select MIPS_GT64120
help
This is an evaluation board based on the Galileo GT-64120
single-chip system controller that contains a MIPS R5000 compatible
select IRQ_CPU
select MIPS_GT96100
select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
help
This is an evaluation board based on the Galileo GT-96100 LAN/WAN
communications controllers containing a MIPS R5000 compatible core
bool "Support for LASAT Networks platforms"
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select MIPS_GT64120
select R5000_CPU_SCACHE
config PICVUE
bool "LASAT sysctl interface"
depends on LASAT
-config HP_LASERJET
- bool "Support for Hewlett Packard LaserJet board"
- depends on BROKEN
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select IRQ_CPU
-
config MIPS_ITE8172
bool "Support for ITE 8172G board"
select DMA_NONCOHERENT
config MIPS_ATLAS
bool "Support for MIPS Atlas board"
+ select BOOT_ELF32
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select MIPS_GT64120
+ select SWAP_IO_SPACE
help
This enables support for the QED R5231-based MIPS Atlas evaluation
board.
config MIPS_MALTA
bool "Support for MIPS Malta board"
+ select BOOT_ELF32
select HAVE_STD_PC_SERIAL_PORT
select DMA_NONCOHERENT
+ select GENERIC_ISA_DMA
select HW_HAS_PCI
+ select I8259
+ select MIPS_GT64120
+ select SWAP_IO_SPACE
help
This enables support for the VR5000-based MIPS Malta evaluation
board.
select HW_HAS_PCI
select IRQ_CPU
select IRQ_CPU_RM7K
+ select MIPS_GT64120
select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
select IRQ_CPU_RM7K
select PCI_MARVELL
select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
select IRQ_MV64340
select PCI_MARVELL
select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
+config MOMENCO_OCELOT_3
+ bool "Support for Momentum Ocelot-3 board"
+ select BOOT_ELF32
+ select DMA_NONCOHERENT
+ select HW_HAS_PCI
+ select IRQ_CPU
+ select IRQ_CPU_RM7K
+ select IRQ_MV64340
+ select PCI_MARVELL
+ select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
+ help
+ The Ocelot-3 is based off Discovery III System Controller and
+ PMC-Sierra Rm79000 core.
+
config MOMENCO_JAGUAR_ATX
bool "Support for Momentum Jaguar board"
+ select BOOT_ELF32
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
select LIMITED_DMA
select PCI_MARVELL
select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
help
The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
select HW_HAS_PCI
select IRQ_CPU
select IRQ_CPU_RM7K
+ select IRQ_CPU_RM9K
+ select SWAP_IO_SPACE
help
Yosemite is an evaluation board for the RM9000x2 processor
manufactured by PMC-Sierra
select HAVE_STD_PC_SERIAL_PORT
select HW_HAS_PCI
select IRQ_CPU
+ select I8259
select ISA
help
This enables support for the VR5000-based NEC DDB Vrc-5074
select HAVE_STD_PC_SERIAL_PORT
select HW_HAS_PCI
select IRQ_CPU
+ select I8259
select ISA
help
This enables support for the R5432-based NEC DDB Vrc-5476
bool "Support for NEC DDB Vrc-5477"
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select I8259
select IRQ_CPU
help
This enables support for the R5432-based NEC DDB Vrc-5477,
config SGI_IP22
bool "Support for SGI IP22 (Indy/Indigo2)"
+ select ARC
+ select ARC32
+ select BOOT_ELF32
select DMA_NONCOHERENT
select IP22_CPU_SCACHE
select IRQ_CPU
+ select SWAP_IO_SPACE
help
This are the SGI Indy, Challenge S and Indigo2, as well as certain
OEM variants like the Tandem CMN B006S. To compile a Linux kernel
config SGI_IP27
bool "Support for SGI IP27 (Origin200/2000)"
depends on MIPS64
+ select ARC
+ select ARC64
select DMA_IP27
select HW_HAS_PCI
+ select PCI_DOMAINS
help
This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
workstations. To compile a Linux kernel that runs on these, say Y
bool "Mapped kernel support"
depends on SGI_IP27
help
- Change the way a Linux kernel is loaded unto memory on a MIPS64
+ Change the way a Linux kernel is loaded into memory on a MIPS64
machine. This is required in order to support text replication and
- NUMA. If you need to undersatand it, read the source code.
+ NUMA. If you need to understand it, read the source code.
config REPLICATE_KTEXT
bool "Kernel text replication support"
config SGI_IP32
bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ depends on MIPS64 && EXPERIMENTAL
+ select ARC
+ select ARC32
+ select BOOT_ELF32
+ select OWN_DMA
+ select DMA_IP32
select DMA_NONCOHERENT
select HW_HAS_PCI
select R5000_CPU_SCACHE
choice
prompt "Au1X00 SOC Type"
depends on SOC_AU1X00
- help
- Say Y here to enable support for one of three AMD/Alchemy
- SOCs. For additional documentation see www.amd.com.
+ help
+ Say Y here to enable support for one of three AMD/Alchemy
+ SOCs. For additional documentation see www.amd.com.
config SOC_AU1000
- bool "SOC_AU1000"
+ bool "SOC_AU1000"
config SOC_AU1100
- bool "SOC_AU1100"
+ bool "SOC_AU1100"
config SOC_AU1500
- bool "SOC_AU1500"
+ bool "SOC_AU1500"
config SOC_AU1550
- bool "SOC_AU1550"
+ bool "SOC_AU1550"
endchoice
choice
- prompt "AMD/Alchemy Au1x00 board support"
- depends on SOC_AU1X00
+ prompt "AMD/Alchemy Au1x00 board support"
+ depends on SOC_AU1X00
help
These are evaluation boards built by AMD/Alchemy to
showcase their Au1X00 Internet Edge Processors. The SOC design
is based on the MIPS32 architecture running at 266/400/500MHz
- with many integrated peripherals. Further information can be
- found at their website, <http://www.amd.com/>. Say Y here if you
- wish to build a kernel for this platform.
+ with many integrated peripherals. Further information can be
+ found at their website, <http://www.amd.com/>. Say Y here if you
+ wish to build a kernel for this platform.
config MIPS_PB1000
bool "PB1000 board"
depends on SOC_AU1000
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select SWAP_IO_SPACE
config MIPS_PB1100
bool "PB1100 board"
depends on SOC_AU1100
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select SWAP_IO_SPACE
config MIPS_PB1500
bool "PB1500 board"
depends on SOC_AU1500
- select DMA_NONCOHERENT
+ select DMA_COHERENT
select HW_HAS_PCI
config MIPS_PB1550
bool "PB1550 board"
depends on SOC_AU1550
- select DMA_NONCOHERENT
+ select DMA_COHERENT
select HW_HAS_PCI
+ select MIPS_DISABLE_OBSOLETE_IDE
config MIPS_DB1000
bool "DB1000 board"
config MIPS_DB1500
bool "DB1500 board"
depends on SOC_AU1500
- select DMA_NONCOHERENT
+ select DMA_COHERENT
select HW_HAS_PCI
+ select MIPS_DISABLE_OBSOLETE_IDE
config MIPS_DB1550
bool "DB1550 board"
depends on SOC_AU1550
select HW_HAS_PCI
+ select DMA_COHERENT
+ select MIPS_DISABLE_OBSOLETE_IDE
config MIPS_BOSPORUS
bool "Bosporus board"
config MIPS_MTX1
bool "4G Systems MTX-1 board"
depends on SOC_AU1500
+ select HW_HAS_PCI
select DMA_NONCOHERENT
endchoice
config SIBYTE_SB1xxx_SOC
bool "Support for Broadcom BCM1xxx SOCs (EXPERIMENTAL)"
depends on EXPERIMENTAL
+ select BOOT_ELF32
select DMA_COHERENT
+ select SWAP_IO_SPACE
choice
prompt "BCM1xxx SOC-based board"
config CPU_SB1_PASS_1
bool "1250 Pass1"
depends on SIBYTE_SB1250
+ select CPU_HAS_PREFETCH
config CPU_SB1_PASS_2_1250
bool "1250 An"
config CPU_SB1_PASS_2_2
bool "1250 Bn"
depends on SIBYTE_SB1250
+ select CPU_HAS_PREFETCH
help
Also called BCM1250 Pass 2.2
config CPU_SB1_PASS_4
bool "1250 Cn"
depends on SIBYTE_SB1250
+ select CPU_HAS_PREFETCH
help
Also called BCM1250 Pass 3
config CPU_SB1_PASS_3
bool "112x An"
depends on SIBYTE_BCM112X
+ select CPU_HAS_PREFETCH
endchoice
config SNI_RM200_PCI
bool "Support for SNI RM200 PCI"
+ select ARC
+ select ARC32
+ select BOOT_ELF32
select DMA_NONCOHERENT
+ select GENERIC_ISA_DMA
select HAVE_STD_PC_SERIAL_PORT
select HW_HAS_PCI
+ select I8259
select ISA
help
The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens
bool "Support for Toshiba TBTX49[23]7 board"
depends on MIPS32
select DMA_NONCOHERENT
+ select HAS_TXX9_SERIAL
select HW_HAS_PCI
+ select I8259
select ISA
+ select SWAP_IO_SPACE
+ help
+ This Toshiba board is based on the TX4927 processor. Say Y here to
+ support this machine type
+
+config TOSHIBA_FPCIB0
+ bool "FPCIB0 Backplane Support"
+ depends on TOSHIBA_RBTX4927
config RWSEM_GENERIC_SPINLOCK
bool
config RWSEM_XCHGADD_ALGORITHM
bool
+config GENERIC_CALIBRATE_DELAY
+ bool
+ default y
+
config HAVE_DEC_LOCK
bool
default y
depends on LASAT
default y
+config MIPS_DISABLE_OBSOLETE_IDE
+ bool
+
config CPU_LITTLE_ENDIAN
bool "Generate little endian code"
- default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || HP_LASERJET || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || NEC_OSPREY || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
- default n if BAGET_MIPS || MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
+ default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || NEC_OSPREY || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
+ default n if MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
help
Some MIPS machines can be configured for either little or big endian
byte order. These modes require different kernels. Say Y if your
config MIPS_TX3927
bool
depends on TOSHIBA_JMR3927
+ select HAS_TXX9_SERIAL
default y
config PCI_MARVELL
config SWAP_IO_SPACE
bool
- depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SIBYTE_SB1xxx_SOC || SGI_IP22 || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MOMENCO_JAGUAR_ATX || MIPS_MALTA || MIPS_ATLAS || MIPS_EV96100 || MIPS_PB1100 || MIPS_PB1000
- default y
#
# Unfortunately not all GT64120 systems run the chip at the same clock.
endchoice
-config AU1000_USB_DEVICE
+config AU1X00_USB_DEVICE
bool
depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
default n
config BOOT_ELF32
bool
- depends on MACH_DECSTATION || MIPS_ATLAS || MIPS_MALTA || MOMENCO_JAGUAR_ATX || SIBYTE_SB1xxx_SOC || SGI_IP32 || SGI_IP22 || SNI_RM200_PCI
+ depends on MACH_DECSTATION || MIPS_ATLAS || MIPS_MALTA || MOMENCO_JAGUAR_ATX || MOMENCO_OCELOT_3 || SIBYTE_SB1xxx_SOC || SGI_IP32 || SGI_IP22 || SNI_RM200_PCI
default y
config MIPS_L1_CACHE_SHIFT
(e.g. an accelerated X server) and that are not frame buffer
device-aware may cause unexpected results. If unsure, say N.
-config FB_G364
- bool
- depends on MIPS_MAGNUM_4000 || OLIVETTI_M700
- default y
-
config HAVE_STD_PC_SERIAL_PORT
bool
depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927
default y
-config TANBAC_TB0219
- bool "Added TANBAC TB0219 Base board support"
- depends on TANBAC_TB0229
-
endmenu
menu "CPU selection"
processors are extremly rare and the support for them is incomplete.
config CPU_NEVADA
- bool "R52xx"
+ bool "RM52xx"
help
- MIPS Technologies R52x0-series ("Nevada") processors.
+ QED / PMC-Sierra RM52xx-series ("Nevada") processors.
config CPU_R8000
bool "R8000"
#
config HIGHMEM
bool "High Memory Support"
- depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(BAGET_MIPS || MACH_DECSTATION || MOMENCO_JAGUAR_ATX)
+ depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(MACH_DECSTATION || MOMENCO_JAGUAR_ATX)
config SMP
bool "Multi-Processing support"
information about which PCI hardware does work under Linux and which
doesn't.
+config PCI_DOMAINS
+ bool
+ depends on PCI
+
source "drivers/pci/Kconfig"
#
bool
default y if MIPS32
+config BUILD_ELF64
+ bool "Use 64-bit ELF format for building"
+ depends on MIPS64
+ help
+ A 64-bit kernel is usually built using the 64-bit ELF binary object
+ format as it's one that allows arbitrary 64-bit constructs. For
+ kernels that are loaded within the KSEG compatibility segments the
+ 32-bit ELF format can optionally be used resulting in a somewhat
+ smaller binary, but this option is not explicitly supported by the
+ toolchain and since binutils 2.14 it does not even work at all.
+
+ Say Y to use the 64-bit format or N to use the 32-bit one.
+
+ If unsure say Y.
+
config BINFMT_IRIX
bool "Include IRIX binary compatibility"
- depends on !CPU_LITTLE_ENDIAN && MIPS32
+ depends on !CPU_LITTLE_ENDIAN && MIPS32 && BROKEN
config MIPS32_COMPAT
bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
endmenu
-menu "MIPS initrd options"
- depends on BLK_DEV_INITRD
-
-config EMBEDDED_RAMDISK
- bool "Embed root filesystem ramdisk into the kernel"
-
-config EMBEDDED_RAMDISK_IMAGE
- string "Filename of gziped ramdisk image"
- depends on EMBEDDED_RAMDISK
- default "ramdisk.gz"
- help
- This is the filename of the ramdisk image to be built into the
- kernel. Relative pathnames are relative to arch/mips/ramdisk/.
- The ramdisk image is not part of the kernel distribution; you must
- provide one yourself.
-
-endmenu
-
source "drivers/Kconfig"
source "fs/Kconfig"
source "crypto/Kconfig"
source "lib/Kconfig"
+
+#
+# Use the generic interrupt handling code in kernel/irq/:
+#
+config GENERIC_HARDIRQS
+ bool
+ default y
+
+config GENERIC_IRQ_PROBE
+ bool
+ default y
git://git.onelab.eu / linux-2.6.git / blobdiff