fedora core 6 1.2949 + vserver 2.2.0

[linux-2.6.git] / arch / mips / gt64120 / ev64120 / irq.c

diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c
index 3b18615..b3e5796 100644 (file)
--- a/arch/mips/gt64120/ev64120/irq.c
+++ b/arch/mips/gt64120/ev64120/irq.c
@@ -46,81 +46,63 @@
 #include <asm/system.h>
 #include <asm/gt64120.h>
 
-asmlinkage inline void pci_intA(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
 {
-       do_IRQ(GT_INTA, regs);
-}
-
-asmlinkage inline void pci_intD(struct pt_regs *regs)
-{
-       do_IRQ(GT_INTD, regs);
+       unsigned int pending = read_c0_status() & read_c0_cause();
+
+       if (pending & STATUSF_IP4)              /* int2 hardware line (timer) */
+               do_IRQ(4);
+       else if (pending & STATUSF_IP2)         /* int0 hardware line */
+               do_IRQ(GT_INTA);
+       else if (pending & STATUSF_IP5)         /* int3 hardware line */
+               do_IRQ(GT_INTD);
+       else if (pending & STATUSF_IP6)         /* int4 hardware line */
+               do_IRQ(6);
+       else if (pending & STATUSF_IP7)         /* compare int */
+               do_IRQ(7);
+       else
+               spurious_interrupt();
 }
 
 static void disable_ev64120_irq(unsigned int irq_nr)
 {
-       unsigned long flags;
-
-       local_irq_save(flags);
        if (irq_nr >= 8) {      // All PCI interrupts are on line 5 or 2
                clear_c0_status(9 << 10);
        } else {
                clear_c0_status(1 << (irq_nr + 8));
        }
-       local_irq_restore(flags);
 }
 
 static void enable_ev64120_irq(unsigned int irq_nr)
 {
-       unsigned long flags;
-
-       local_irq_save(flags);
        if (irq_nr >= 8)        // All PCI interrupts are on line 5 or 2
                set_c0_status(9 << 10);
        else
                set_c0_status(1 << (irq_nr + 8));
-       local_irq_restore(flags);
-}
-
-static unsigned int startup_ev64120_irq(unsigned int irq)
-{
-       enable_ev64120_irq(irq);
-       return 0;               /* Never anything pending  */
 }
 
-#define shutdown_ev64120_irq     disable_ev64120_irq
-#define mask_and_ack_ev64120_irq disable_ev64120_irq
-
 static void end_ev64120_irq(unsigned int irq)
 {
        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
                enable_ev64120_irq(irq);
 }
 
-static struct hw_interrupt_type ev64120_irq_type = {
+static struct irq_chip ev64120_irq_type = {
        .typename       = "EV64120",
-       .startup        = startup_ev64120_irq,
-       .shutdown       = shutdown_ev64120_irq,
-       .enable         = enable_ev64120_irq,
-       .disable        = disable_ev64120_irq,
-       .ack            = mask_and_ack_ev64120_irq,
+       .ack            = disable_ev64120_irq,
+       .mask           = disable_ev64120_irq,
+       .mask_ack       = disable_ev64120_irq,
+       .unmask         = enable_ev64120_irq,
        .end            = end_ev64120_irq,
-       .set_affinity   = NULL
 };
 
 void gt64120_irq_setup(void)
 {
-       extern asmlinkage void galileo_handle_int(void);
-
        /*
         * Clear all of the interrupts while we change the able around a bit.
         */
        clear_c0_status(ST0_IM);
 
-       /* Sets the exception_handler array. */
-       set_except_vector(0, galileo_handle_int);
-
-       local_irq_disable();
-
        /*
         * Enable timer.  Other interrupts will be enabled as they are
         * registered.
@@ -130,16 +112,5 @@ void gt64120_irq_setup(void)
 
 void __init arch_init_irq(void)
 {
-       int i;
-
-       /*  Let's initialize our IRQ descriptors  */
-       for (i = 0; i < NR_IRQS; i++) {
-               irq_desc[i].status = 0;
-               irq_desc[i].handler = &no_irq_type;
-               irq_desc[i].action = NULL;
-               irq_desc[i].depth = 0;
-               spin_lock_init(&irq_desc[i].lock);
-       }
-
        gt64120_irq_setup();
 }