* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/serial_reg.h>
+#include <linux/bitops.h>
-#include <asm/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/it8172/it8172_int.h>
#include <asm/it8172/it8172_dbg.h>
-#undef DEBUG_IRQ
-#ifdef DEBUG_IRQ
-/* note: prints function name for you */
-#define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args)
-#else
-#define DPRINTK(fmt, args...)
-#endif
-
-#ifdef CONFIG_KGDB
-extern void breakpoint(void);
-#endif
-
/* revisit */
#define EXT_IRQ0_TO_IP 2 /* IP 2 */
#define EXT_IRQ5_TO_IP 7 /* IP 7 */
struct it8172_intc_regs volatile *it8172_hw0_icregs =
(struct it8172_intc_regs volatile *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_INTC_BASE));
-/* Function for careful CP0 interrupt mask access */
-static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
-{
- unsigned long status = read_c0_status();
- status &= ~((clr_mask & 0xFF) << 8);
- status |= (set_mask & 0xFF) << 8;
- write_c0_status(status);
-}
-
-static inline void mask_irq(unsigned int irq_nr)
-{
- modify_cp0_intmask(irq_nr, 0);
-}
-
-static inline void unmask_irq(unsigned int irq_nr)
-{
- modify_cp0_intmask(0, irq_nr);
-}
-
-void local_disable_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- disable_it8172_irq(irq_nr);
- local_irq_restore(flags);
-}
-
-void local_enable_irq(unsigned int irq_nr)
+static void disable_it8172_irq(unsigned int irq_nr)
{
- unsigned long flags;
-
- local_irq_save(flags);
- enable_it8172_irq(irq_nr);
- local_irq_restore(flags);
-}
-
-
-void disable_it8172_irq(unsigned int irq_nr)
-{
- DPRINTK("disable_it8172_irq %d\n", irq_nr);
-
if ( (irq_nr >= IT8172_LPC_IRQ_BASE) && (irq_nr <= IT8172_SERIRQ_15)) {
/* LPC interrupt */
- DPRINTK("DB lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
it8172_hw0_icregs->lpc_mask |=
(1 << (irq_nr - IT8172_LPC_IRQ_BASE));
- DPRINTK("DA lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
- }
- else if ( (irq_nr >= IT8172_LB_IRQ_BASE) && (irq_nr <= IT8172_IOCHK_IRQ)) {
+ } else if ( (irq_nr >= IT8172_LB_IRQ_BASE) && (irq_nr <= IT8172_IOCHK_IRQ)) {
/* Local Bus interrupt */
- DPRINTK("DB lb_mask %x\n", it8172_hw0_icregs->lb_mask);
it8172_hw0_icregs->lb_mask |=
(1 << (irq_nr - IT8172_LB_IRQ_BASE));
- DPRINTK("DA lb_mask %x\n", it8172_hw0_icregs->lb_mask);
- }
- else if ( (irq_nr >= IT8172_PCI_DEV_IRQ_BASE) && (irq_nr <= IT8172_DMA_IRQ)) {
+ } else if ( (irq_nr >= IT8172_PCI_DEV_IRQ_BASE) && (irq_nr <= IT8172_DMA_IRQ)) {
/* PCI and other interrupts */
- DPRINTK("DB pci_mask %x\n", it8172_hw0_icregs->pci_mask);
it8172_hw0_icregs->pci_mask |=
(1 << (irq_nr - IT8172_PCI_DEV_IRQ_BASE));
- DPRINTK("DA pci_mask %x\n", it8172_hw0_icregs->pci_mask);
- }
- else if ( (irq_nr >= IT8172_NMI_IRQ_BASE) && (irq_nr <= IT8172_POWER_NMI_IRQ)) {
+ } else if ( (irq_nr >= IT8172_NMI_IRQ_BASE) && (irq_nr <= IT8172_POWER_NMI_IRQ)) {
/* NMI interrupts */
- DPRINTK("DB nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
it8172_hw0_icregs->nmi_mask |=
(1 << (irq_nr - IT8172_NMI_IRQ_BASE));
- DPRINTK("DA nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
- }
- else {
+ } else {
panic("disable_it8172_irq: bad irq %d", irq_nr);
}
}
-void enable_it8172_irq(unsigned int irq_nr)
+static void enable_it8172_irq(unsigned int irq_nr)
{
- DPRINTK("enable_it8172_irq %d\n", irq_nr);
if ( (irq_nr >= IT8172_LPC_IRQ_BASE) && (irq_nr <= IT8172_SERIRQ_15)) {
/* LPC interrupt */
- DPRINTK("EB before lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
it8172_hw0_icregs->lpc_mask &=
~(1 << (irq_nr - IT8172_LPC_IRQ_BASE));
- DPRINTK("EA after lpc_mask %x\n", it8172_hw0_icregs->lpc_mask);
}
else if ( (irq_nr >= IT8172_LB_IRQ_BASE) && (irq_nr <= IT8172_IOCHK_IRQ)) {
/* Local Bus interrupt */
- DPRINTK("EB lb_mask %x\n", it8172_hw0_icregs->lb_mask);
it8172_hw0_icregs->lb_mask &=
~(1 << (irq_nr - IT8172_LB_IRQ_BASE));
- DPRINTK("EA lb_mask %x\n", it8172_hw0_icregs->lb_mask);
}
else if ( (irq_nr >= IT8172_PCI_DEV_IRQ_BASE) && (irq_nr <= IT8172_DMA_IRQ)) {
/* PCI and other interrupts */
- DPRINTK("EB pci_mask %x\n", it8172_hw0_icregs->pci_mask);
it8172_hw0_icregs->pci_mask &=
~(1 << (irq_nr - IT8172_PCI_DEV_IRQ_BASE));
- DPRINTK("EA pci_mask %x\n", it8172_hw0_icregs->pci_mask);
}
else if ( (irq_nr >= IT8172_NMI_IRQ_BASE) && (irq_nr <= IT8172_POWER_NMI_IRQ)) {
/* NMI interrupts */
- DPRINTK("EB nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
it8172_hw0_icregs->nmi_mask &=
~(1 << (irq_nr - IT8172_NMI_IRQ_BASE));
- DPRINTK("EA nmi_mask %x\n", it8172_hw0_icregs->nmi_mask);
}
else {
panic("enable_it8172_irq: bad irq %d", irq_nr);
unsigned long flags;
local_irq_save(flags);
- unmask_irq(1<<EXT_IRQ5_TO_IP); /* timer interrupt */
+ set_c0_status(0x100 << EXT_IRQ5_TO_IP);
local_irq_restore(flags);
}
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
int i;
unsigned long flags;
memset(irq_desc, 0, sizeof(irq_desc));
set_except_vector(0, it8172_IRQ);
- init_generic_irq();
-
/* mask all interrupts */
it8172_hw0_icregs->lb_mask = 0xffff;
it8172_hw0_icregs->lpc_mask = 0xffff;
}
irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type;
set_c0_status(ALLINTS_NOTIMER);
-
-#ifdef CONFIG_KGDB
- /* If local serial I/O used for debug port, enter kgdb at once */
- puts("Waiting for kgdb to connect...");
- set_debug_traps();
- breakpoint();
-#endif
}
void mips_spurious_interrupt(struct pt_regs *regs)
cause = read_c0_cause();
printk("status %x cause %x\n", status, cause);
printk("epc %x badvaddr %x \n", regs->cp0_epc, regs->cp0_badvaddr);
-// while(1);
#endif
}
status >>= 1;
}
irq += IT8172_PCI_DEV_IRQ_BASE;
- //printk("pci int %d\n", irq);
- }
- else if (intstatus & 0x1) {
+ } else if (intstatus & 0x1) {
/* Local Bus interrupt */
irq = 0;
status |= it8172_hw0_icregs->lb_req;
status >>= 1;
}
irq += IT8172_LB_IRQ_BASE;
- //printk("lb int %d\n", irq);
- }
- else if (intstatus & 0x2) {
+ } else if (intstatus & 0x2) {
/* LPC interrupt */
/* Since some lpc interrupts are edge triggered,
* we could lose an interrupt this way because
status >>= 1;
}
irq += IT8172_LPC_IRQ_BASE;
- //printk("LPC int %d\n", irq);
} else
return;
git://git.onelab.eu / linux-2.6.git / blobdiff