Fedora kernel-2.6.17-1.2142_FC4 patched with stable patch-2.6.17.4-vs2.0.2-rc26.diff
[linux-2.6.git] / arch / mips / kernel / entry.S
index 5eb4291..a9c6de1 100644 (file)
 #include <asm/isadep.h>
 #include <asm/thread_info.h>
 #include <asm/war.h>
+#ifdef CONFIG_MIPS_MT_SMTC
+#include <asm/mipsmtregs.h>
+#endif
 
 #ifdef CONFIG_PREEMPT
-       .macro  preempt_stop reg=t0
+       .macro  preempt_stop
        .endm
 #else
-       .macro  preempt_stop reg=t0
-       local_irq_disable \reg
+       .macro  preempt_stop
+       local_irq_disable
        .endm
 #define resume_kernel  restore_all
 #endif
@@ -37,17 +40,18 @@ FEXPORT(ret_from_irq)
        andi    t0, t0, KU_USER
        beqz    t0, resume_kernel
 
-FEXPORT(resume_userspace)
-       local_irq_disable       t0      # make sure we dont miss an
+resume_userspace:
+       local_irq_disable               # make sure we dont miss an
                                        # interrupt setting need_resched
                                        # between sampling and return
        LONG_L  a2, TI_FLAGS($28)       # current->work
-       andi    a2, _TIF_WORK_MASK      # (ignoring syscall_trace)
-       bnez    a2, work_pending
+       andi    t0, a2, _TIF_WORK_MASK  # (ignoring syscall_trace)
+       bnez    t0, work_pending
        j       restore_all
 
 #ifdef CONFIG_PREEMPT
-ENTRY(resume_kernel)
+resume_kernel:
+       local_irq_disable
        lw      t0, TI_PRE_COUNT($28)
        bnez    t0, restore_all
 need_resched:
@@ -57,12 +61,7 @@ need_resched:
        LONG_L  t0, PT_STATUS(sp)               # Interrupts off?
        andi    t0, 1
        beqz    t0, restore_all
-       li      t0, PREEMPT_ACTIVE
-       sw      t0, TI_PRE_COUNT($28)
-       local_irq_enable t0
-       jal     schedule
-       sw      zero, TI_PRE_COUNT($28)
-       local_irq_disable t0
+       jal     preempt_schedule_irq
        b       need_resched
 #endif
 
@@ -79,6 +78,37 @@ FEXPORT(syscall_exit)
        bnez    t0, syscall_exit_work
 
 FEXPORT(restore_all)                   # restore full frame
+#ifdef CONFIG_MIPS_MT_SMTC
+/* Detect and execute deferred IPI "interrupts" */
+       move    a0,sp
+       jal     deferred_smtc_ipi
+/* Re-arm any temporarily masked interrupts not explicitly "acked" */
+       mfc0    v0, CP0_TCSTATUS
+       ori     v1, v0, TCSTATUS_IXMT
+       mtc0    v1, CP0_TCSTATUS
+       andi    v0, TCSTATUS_IXMT
+       ehb
+       mfc0    t0, CP0_TCCONTEXT
+       DMT     9                               # dmt t1
+       jal     mips_ihb
+       mfc0    t2, CP0_STATUS
+       andi    t3, t0, 0xff00
+       or      t2, t2, t3
+       mtc0    t2, CP0_STATUS
+       ehb
+       andi    t1, t1, VPECONTROL_TE
+       beqz    t1, 1f
+       EMT
+1:
+       mfc0    v1, CP0_TCSTATUS
+       /* We set IXMT above, XOR should clear it here */
+       xori    v1, v1, TCSTATUS_IXMT
+       or      v1, v0, v1
+       mtc0    v1, CP0_TCSTATUS
+       ehb
+       xor     t0, t0, t3
+       mtc0    t0, CP0_TCCONTEXT
+#endif /* CONFIG_MIPS_MT_SMTC */
        .set    noat
        RESTORE_TEMP
        RESTORE_AT
@@ -88,13 +118,13 @@ FEXPORT(restore_partial)           # restore partial frame
        RESTORE_SP_AND_RET
        .set    at
 
-FEXPORT(work_pending)
-       andi    t0, a2, _TIF_NEED_RESCHED
+work_pending:
+       andi    t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
        beqz    t0, work_notifysig
 work_resched:
        jal     schedule
 
-       local_irq_disable t0            # make sure need_resched and
+       local_irq_disable               # make sure need_resched and
                                        # signals dont change between
                                        # sampling and return
        LONG_L  a2, TI_FLAGS($28)
@@ -109,15 +139,14 @@ work_notifysig:                           # deal with pending signals and
        move    a0, sp
        li      a1, 0
        jal     do_notify_resume        # a2 already loaded
-       j       restore_all
+       j       resume_userspace
 
 FEXPORT(syscall_exit_work_partial)
        SAVE_STATIC
-FEXPORT(syscall_exit_work)
-       LONG_L  t0, TI_FLAGS($28)
-       li      t1, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
-       and     t0, t1
-       beqz    t0, work_pending        # trace bit is set
+syscall_exit_work:
+       li      t0, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
+       and     t0, a2                  # a2 is preloaded with TI_FLAGS
+       beqz    t0, work_pending        # trace bit set?
        local_irq_enable                # could let do_syscall_trace()
                                        # call schedule() instead
        move    a0, sp
@@ -125,31 +154,17 @@ FEXPORT(syscall_exit_work)
        jal     do_syscall_trace
        b       resume_userspace
 
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
+
 /*
- * Common spurious interrupt handler.
+ * MIPS32R2 Instruction Hazard Barrier - must be called
+ *
+ * For C code use the inline version named instruction_hazard().
  */
-       .text
-       .align  5
-LEAF(spurious_interrupt)
-       /*
-        * Someone tried to fool us by sending an interrupt but we
-        * couldn't find a cause for it.
-        */
-#ifdef CONFIG_SMP
-       lui     t1, %hi(irq_err_count)
-1:     ll      t0, %lo(irq_err_count)(t1)
-       addiu   t0, 1
-       sc      t0, %lo(irq_err_count)(t1)
-#if R10000_LLSC_WAR
-       beqzl   t0, 1b
-#else
-       beqz    t0, 1b
-#endif
-#else
-       lui     t1, %hi(irq_err_count)
-       lw      t0, %lo(irq_err_count)(t1)
-       addiu   t0, 1
-       sw      t0, %lo(irq_err_count)(t1)
-#endif
-       j       ret_from_irq
-       END(spurious_interrupt)
+LEAF(mips_ihb)
+       .set    mips32r2
+       jr.hb   ra
+       nop
+       END(mips_ihb)
+
+#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */