Fedora kernel-2.6.17-1.2142_FC4 patched with stable patch-2.6.17.4-vs2.0.2-rc26.diff
[linux-2.6.git] / arch / mips / kernel / irq-msc01.c
index 43c00ac..97ebdc7 100644 (file)
@@ -74,8 +74,13 @@ static void disable_msc_irq(unsigned int irq)
 static void level_mask_and_ack_msc_irq(unsigned int irq)
 {
        mask_msc_irq(irq);
-       if (!cpu_has_ei)
+       if (!cpu_has_veic)
                MSCIC_WRITE(MSC01_IC_EOI, 0);
+#ifdef CONFIG_MIPS_MT_SMTC
+       /* This actually needs to be a call into platform code */
+       if (irq_hwmask[irq] & ST0_IM)
+               set_c0_status(irq_hwmask[irq] & ST0_IM);
+#endif /* CONFIG_MIPS_MT_SMTC */
 }
 
 /*
@@ -84,7 +89,7 @@ static void level_mask_and_ack_msc_irq(unsigned int irq)
 static void edge_mask_and_ack_msc_irq(unsigned int irq)
 {
        mask_msc_irq(irq);
-       if (!cpu_has_ei)
+       if (!cpu_has_veic)
                MSCIC_WRITE(MSC01_IC_EOI, 0);
        else {
                u32 r;
@@ -92,6 +97,10 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq)
                MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT);
                MSCIC_WRITE(MSC01_IC_SUP+irq*8, r);
        }
+#ifdef CONFIG_MIPS_MT_SMTC
+       if (irq_hwmask[irq] & ST0_IM)
+               set_c0_status(irq_hwmask[irq] & ST0_IM);
+#endif /* CONFIG_MIPS_MT_SMTC */
 }
 
 /*
@@ -129,25 +138,23 @@ msc_bind_eic_interrupt (unsigned int irq, unsigned int set)
 #define shutdown_msc_irq       disable_msc_irq
 
 struct hw_interrupt_type msc_levelirq_type = {
-       "SOC-it-Level",
-       startup_msc_irq,
-       shutdown_msc_irq,
-       enable_msc_irq,
-       disable_msc_irq,
-       level_mask_and_ack_msc_irq,
-       end_msc_irq,
-       NULL
+       .typename = "SOC-it-Level",
+       .startup = startup_msc_irq,
+       .shutdown = shutdown_msc_irq,
+       .enable = enable_msc_irq,
+       .disable = disable_msc_irq,
+       .ack = level_mask_and_ack_msc_irq,
+       .end = end_msc_irq,
 };
 
 struct hw_interrupt_type msc_edgeirq_type = {
-       "SOC-it-Edge",
-       startup_msc_irq,
-       shutdown_msc_irq,
-       enable_msc_irq,
-       disable_msc_irq,
-       edge_mask_and_ack_msc_irq,
-       end_msc_irq,
-       NULL
+       .typename = "SOC-it-Edge",
+       .startup =startup_msc_irq,
+       .shutdown = shutdown_msc_irq,
+       .enable = enable_msc_irq,
+       .disable = disable_msc_irq,
+       .ack = edge_mask_and_ack_msc_irq,
+       .end = end_msc_irq,
 };
 
 
@@ -168,14 +175,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq)
                switch (imp->im_type) {
                case MSC01_IRQ_EDGE:
                        irq_desc[base+n].handler = &msc_edgeirq_type;
-                       if (cpu_has_ei)
+                       if (cpu_has_veic)
                                MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
                        else
                                MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
                        break;
                case MSC01_IRQ_LEVEL:
                        irq_desc[base+n].handler = &msc_levelirq_type;
-                       if (cpu_has_ei)
+                       if (cpu_has_veic)
                                MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
                        else
                                MSCIC_WRITE(MSC01_IC_SUP+n*8, imp->im_lvl);