linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / arch / mips / kernel / r4k_switch.S

diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index d5c8b82..d2afbd1 100644 (file)
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -10,6 +10,7 @@
  * Copyright (C) 2000 MIPS Technologies, Inc.
  *    written by Carsten Langgaard, carstenl@mips.com
  */
+#include <linux/config.h>
 #include <asm/asm.h>
 #include <asm/cachectl.h>
 #include <asm/fpregdef.h>
@@ -74,8 +75,8 @@
        and     t0, t0, t1
        LONG_S  t0, ST_OFF(t3)
 
-       fpu_save_double a0 t0 t1                # c0_status passed in t0
-                                               # clobbers t1
+       fpu_save_double a0 t1 t0 t2             # c0_status passed in t1
+                                               # clobbers t0 and t2
 1:
 
        /*
@@ -87,18 +88,7 @@
 
        PTR_ADDIU       t0, $28, _THREAD_SIZE - 32
        set_saved_sp    t0, t1, t2
-#ifdef CONFIG_MIPS_MT_SMTC
-       /* Read-modify-writes of Status must be atomic on a VPE */
-       mfc0    t2, CP0_TCSTATUS
-       ori     t1, t2, TCSTATUS_IXMT
-       mtc0    t1, CP0_TCSTATUS
-       andi    t2, t2, TCSTATUS_IXMT
-       _ehb
-       DMT     8                               # dmt   t0
-       move    t1,ra
-       jal     mips_ihb
-       move    ra,t1
-#endif /* CONFIG_MIPS_MT_SMTC */
+
        mfc0    t1, CP0_STATUS          /* Do we really need this? */
        li      a3, 0xff01
        and     t1, a3
@@ -107,18 +97,6 @@
        and     a2, a3
        or      a2, t1
        mtc0    a2, CP0_STATUS
-#ifdef CONFIG_MIPS_MT_SMTC
-       _ehb
-       andi    t0, t0, VPECONTROL_TE
-       beqz    t0, 1f
-       emt
-1:
-       mfc0    t1, CP0_TCSTATUS
-       xori    t1, t1, TCSTATUS_IXMT
-       or      t1, t1, t2
-       mtc0    t1, CP0_TCSTATUS
-       _ehb
-#endif /* CONFIG_MIPS_MT_SMTC */
        move    v0, a0
        jr      ra
        END(resume)
@@ -128,9 +106,9 @@
  */
 LEAF(_save_fp)
 #ifdef CONFIG_64BIT
-       mfc0    t0, CP0_STATUS
+       mfc0    t1, CP0_STATUS
 #endif
-       fpu_save_double a0 t0 t1                # clobbers t1
+       fpu_save_double a0 t1 t0 t2             # clobbers t1
        jr      ra
        END(_save_fp)
 
@@ -138,10 +116,7 @@ LEAF(_save_fp)
  * Restore a thread's fp context.
  */
 LEAF(_restore_fp)
-#ifdef CONFIG_64BIT
-       mfc0    t0, CP0_STATUS
-#endif
-       fpu_restore_double a0 t0 t1             # clobbers t1
+       fpu_restore_double a0, t1               # clobbers t1
        jr      ra
        END(_restore_fp)
 
@@ -156,19 +131,10 @@ LEAF(_restore_fp)
 #define FPU_DEFAULT  0x00000000
 
 LEAF(_init_fpu)
-#ifdef CONFIG_MIPS_MT_SMTC
-       /* Rather than manipulate per-VPE Status, set per-TC bit in TCStatus */
-       mfc0    t0, CP0_TCSTATUS
-       /* Bit position is the same for Status, TCStatus */
-       li      t1, ST0_CU1
-       or      t0, t1
-       mtc0    t0, CP0_TCSTATUS
-#else /* Normal MIPS CU1 enable */
        mfc0    t0, CP0_STATUS
        li      t1, ST0_CU1
        or      t0, t1
        mtc0    t0, CP0_STATUS
-#endif /* CONFIG_MIPS_MT_SMTC */
        fpu_enable_hazard
 
        li      t1, FPU_DEFAULT