Fedora kernel-2.6.17-1.2142_FC4 patched with stable patch-2.6.17.4-vs2.0.2-rc26.diff

[linux-2.6.git] / arch / mips / kernel / semaphore.c

diff --git a/arch/mips/kernel/semaphore.c b/arch/mips/kernel/semaphore.c
index 9c40fe5..1265358 100644 (file)
--- a/arch/mips/kernel/semaphore.c
+++ b/arch/mips/kernel/semaphore.c
@@ -42,24 +42,28 @@ static inline int __sem_update_count(struct semaphore *sem, int incr)
 
        if (cpu_has_llsc && R10000_LLSC_WAR) {
                __asm__ __volatile__(
-               "1:     ll      %0, %2                                  \n"
+               "       .set    mips3                                   \n"
+               "1:     ll      %0, %2          # __sem_update_count    \n"
                "       sra     %1, %0, 31                              \n"
                "       not     %1                                      \n"
                "       and     %1, %0, %1                              \n"
-               "       add     %1, %1, %3                              \n"
+               "       addu    %1, %1, %3                              \n"
                "       sc      %1, %2                                  \n"
                "       beqzl   %1, 1b                                  \n"
+               "       .set    mips0                                   \n"
                : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
                : "r" (incr), "m" (sem->count));
        } else if (cpu_has_llsc) {
                __asm__ __volatile__(
-               "1:     ll      %0, %2                                  \n"
+               "       .set    mips3                                   \n"
+               "1:     ll      %0, %2          # __sem_update_count    \n"
                "       sra     %1, %0, 31                              \n"
                "       not     %1                                      \n"
                "       and     %1, %0, %1                              \n"
-               "       add     %1, %1, %3                              \n"
+               "       addu    %1, %1, %3                              \n"
                "       sc      %1, %2                                  \n"
                "       beqz    %1, 1b                                  \n"
+               "       .set    mips0                                   \n"
                : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
                : "r" (incr), "m" (sem->count));
        } else {