goto sig;
}
- preempt_disable();
-
if (ll_task == NULL || ll_task == current) {
ll_bit = 1;
} else {
}
ll_task = current;
- preempt_enable();
-
regs->regs[(opcode & RT) >> 16] = value;
compute_return_epc(regs);
signal = SIGBUS;
goto sig;
}
-
- preempt_disable();
-
if (ll_bit == 0 || ll_task != current) {
regs->regs[reg] = 0;
- preempt_enable();
compute_return_epc(regs);
return;
}
- preempt_enable();
-
if (put_user(regs->regs[reg], vaddr)) {
signal = SIGSEGV;
goto sig;
if (fcr31 & FPU_CSR_UNI_X) {
int sig;
- preempt_disable();
-
/*
* Unimplemented operation exception. If we've got the full
* software emulator on-board, let's use it...
/* Restore the hardware register state */
restore_fp(current);
- preempt_enable();
-
/* If something went wrong, signal */
if (sig)
force_sig(sig, current);
break;
case 1:
- preempt_disable();
-
own_fpu();
if (current->used_math) { /* Using the FPU again. */
restore_fp(current);
force_sig(sig, current);
}
- preempt_enable();
-
return;
case 2:
void __init per_cpu_trap_init(void)
{
unsigned int cpu = smp_processor_id();
- unsigned int status_set = ST0_CU0;
- /*
- * Disable coprocessors and select 32-bit or 64-bit addressing
- * and the 16/32 or 32/32 FPR register model. Reset the BEV
- * flag that some firmware may have left set and the TS bit (for
- * IP27). Set XX for ISA IV code to work.
- */
+ /* Some firmware leaves the BEV flag set, clear it. */
+ clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_BEV);
#ifdef CONFIG_MIPS64
- status_set |= ST0_FR|ST0_KX|ST0_SX|ST0_UX;
+ set_c0_status(ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX);
#endif
+
if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
- status_set |= ST0_XX;
- change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
- status_set);
+ set_c0_status(ST0_XX);
/*
* Some MIPS CPUs have a dedicated interrupt vector which reduces the
set_except_vector(24, handle_mcheck);
if (cpu_has_vce)
- /* Special exception: R4[04]00 uses also the divec space. */
- memcpy((void *)(CAC_BASE + 0x180), &except_vec3_r4000, 0x100);
+ memcpy((void *)(CAC_BASE + 0x180), &except_vec3_r4000, 0x80);
else if (cpu_has_4kex)
memcpy((void *)(CAC_BASE + 0x180), &except_vec3_generic, 0x80);
else