linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / arch / mips / mips-boards / sim / sim_int.c

diff --git a/arch/mips/mips-boards/sim/sim_int.c b/arch/mips/mips-boards/sim/sim_int.c
index 2c15c8e..a4d0a2c 100644 (file)
--- a/arch/mips/mips-boards/sim/sim_int.c
+++ b/arch/mips/mips-boards/sim/sim_int.c
@@ -25,71 +25,17 @@
 
 extern void mips_cpu_irq_init(int);
 
-static inline int clz(unsigned long x)
-{
-       __asm__ (
-       "       .set    push                                    \n"
-       "       .set    mips32                                  \n"
-       "       clz     %0, %1                                  \n"
-       "       .set    pop                                     \n"
-       : "=r" (x)
-       : "r" (x));
-
-       return x;
-}
-
-/*
- * Version of ffs that only looks at bits 12..15.
- */
-static inline unsigned int irq_ffs(unsigned int pending)
-{
-#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
-       return -clz(pending) + 31 - CAUSEB_IP;
-#else
-       unsigned int a0 = 7;
-       unsigned int t0;
-
-       t0 = s0 & 0xf000;
-       t0 = t0 < 1;
-       t0 = t0 << 2;
-       a0 = a0 - t0;
-       s0 = s0 << t0;
-
-       t0 = s0 & 0xc000;
-       t0 = t0 < 1;
-       t0 = t0 << 1;
-       a0 = a0 - t0;
-       s0 = s0 << t0;
+extern asmlinkage void simIRQ(void);
 
-       t0 = s0 & 0x8000;
-       t0 = t0 < 1;
-       //t0 = t0 << 2;
-       a0 = a0 - t0;
-       //s0 = s0 << t0;
-
-       return a0;
-#endif
-}
-
-static inline void sim_hw0_irqdispatch(struct pt_regs *regs)
+asmlinkage void sim_hw0_irqdispatch(struct pt_regs *regs)
 {
        do_IRQ(2, regs);
 }
 
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
-{
-       unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
-       int irq;
-
-       irq = irq_ffs(pending);
-
-       if (irq > 0)
-               do_IRQ(MIPSCPU_INT_BASE + irq, regs);
-       else
-               spurious_interrupt(regs);
-}
-
 void __init arch_init_irq(void)
 {
+       /* Now safe to set the exception vector. */
+       set_except_vector(0, simIRQ);
+
        mips_cpu_irq_init(MIPSCPU_INT_BASE);
 }