linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / arch / mips / mm / pg-r4k.c

diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index b7c7492..f51e180 100644 (file)
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -124,7 +124,7 @@ static inline void build_nop(void)
 
 static inline void build_src_pref(int advance)
 {
-       if (!(load_offset & (cpu_dcache_line_size() - 1)) && advance) {
+       if (!(load_offset & (cpu_dcache_line_size() - 1))) {
                union mips_instruction mi;
 
                mi.i_format.opcode     = pref_op;
@@ -166,7 +166,7 @@ static inline void build_load_reg(int reg)
 
 static inline void build_dst_pref(int advance)
 {
-       if (!(store_offset & (cpu_dcache_line_size() - 1)) && advance) {
+       if (!(store_offset & (cpu_dcache_line_size() - 1))) {
                union mips_instruction mi;
 
                mi.i_format.opcode     = pref_op;
@@ -340,12 +340,6 @@ void __init build_clear_page(void)
 
        if (cpu_has_prefetch) {
                switch (current_cpu_data.cputype) {
-               case CPU_TX49XX:
-                       /* TX49 supports only Pref_Load */
-                       pref_offset_clear = 0;
-                       pref_offset_copy = 0;
-                       break;
-
                case CPU_RM9000:
                        /*
                         * As a workaround for erratum G105 which make the
@@ -357,7 +351,6 @@ void __init build_clear_page(void)
 
                case CPU_R10000:
                case CPU_R12000:
-               case CPU_R14000:
                        pref_src_mode = Pref_LoadStreamed;
                        pref_dst_mode = Pref_StoreStreamed;
                        break;