vserver 1.9.5.x5

[linux-2.6.git] / arch / mips / mm / pg-r4k.c

diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index 467fdfe..9f8b165 100644 (file)
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -3,9 +3,8 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (C) 2003, 04, 05 Ralf Baechle (ralf@linux-mips.org)
  */
-#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
@@ -57,12 +56,6 @@ void copy_page(void *to, void *from) __attribute__((alias("copy_page_array")));
 
 EXPORT_SYMBOL(copy_page);
 
-/*
- * An address fits into a single register so it's safe to use 64-bit registers
- * if we have 64-bit adresses.
- */
-#define cpu_has_64bit_registers        cpu_has_64bit_addresses
-
 /*
  * This is suboptimal for 32-bit kernels; we assume that R10000 is only used
  * with 64-bit kernels.  The prefetch offsets have been experimentally tuned
@@ -145,7 +138,7 @@ static inline void __build_load_reg(int reg)
        union mips_instruction mi;
        unsigned int width;
 
-       if (cpu_has_64bit_registers) {
+       if (cpu_has_64bit_gp_regs) {
                mi.i_format.opcode     = ld_op;
                width = 8;
        } else {
@@ -224,7 +217,7 @@ static inline void build_cdex_p(void)
        emit_instruction(mi);
 }
 
-static void __build_store_reg(int reg)
+static void __init __build_store_reg(int reg)
 {
        union mips_instruction mi;
        unsigned int width;
@@ -266,7 +259,7 @@ static inline void build_addiu_a2_a0(unsigned long offset)
 
        BUG_ON(offset > 0x7fff);
 
-       mi.i_format.opcode     = cpu_has_64bit_addresses ? daddiu_op : addiu_op;
+       mi.i_format.opcode     = cpu_has_64bit_gp_regs ? daddiu_op : addiu_op;
        mi.i_format.rs         = 4;             /* $a0 */
        mi.i_format.rt         = 6;             /* $a2 */
        mi.i_format.simmediate = offset;
@@ -280,7 +273,7 @@ static inline void build_addiu_a1(unsigned long offset)
 
        BUG_ON(offset > 0x7fff);
 
-       mi.i_format.opcode     = cpu_has_64bit_addresses ? daddiu_op : addiu_op;
+       mi.i_format.opcode     = cpu_has_64bit_gp_regs ? daddiu_op : addiu_op;
        mi.i_format.rs         = 5;             /* $a1 */
        mi.i_format.rt         = 5;             /* $a1 */
        mi.i_format.simmediate = offset;
@@ -296,7 +289,7 @@ static inline void build_addiu_a0(unsigned long offset)
 
        BUG_ON(offset > 0x7fff);
 
-       mi.i_format.opcode     = cpu_has_64bit_addresses ? daddiu_op : addiu_op;
+       mi.i_format.opcode     = cpu_has_64bit_gp_regs ? daddiu_op : addiu_op;
        mi.i_format.rs         = 4;             /* $a0 */
        mi.i_format.rt         = 4;             /* $a0 */
        mi.i_format.simmediate = offset;
@@ -356,7 +349,7 @@ void __init build_clear_page(void)
                case CPU_R10000:
                case CPU_R12000:
                        pref_src_mode = Pref_LoadStreamed;
-                       pref_dst_mode = Pref_StoreRetained;
+                       pref_dst_mode = Pref_StoreStreamed;
                        break;
 
                default: