#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/mm.h>
-#include <linux/bitops.h>
#include <asm/addrspace.h>
#include <asm/bcache.h>
/* Catch bad driver code */
BUG_ON(size == 0);
- blast_scache_range(addr, addr + size);
+ a = addr & ~(sc_lsize - 1);
+ end = (addr + size - 1) & ~(sc_lsize - 1);
+ while (1) {
+ flush_scache_line(a); /* Hit_Writeback_Inv_SD */
+ if (a == end)
+ break;
+ a += sc_lsize;
+ }
if (!rm7k_tcache_enabled)
return;
/* Catch bad driver code */
BUG_ON(size == 0);
- blast_inv_scache_range(addr, addr + size);
+ a = addr & ~(sc_lsize - 1);
+ end = (addr + size - 1) & ~(sc_lsize - 1);
+ while (1) {
+ invalidate_scache_line(a); /* Hit_Invalidate_SD */
+ if (a == end)
+ break;
+ a += sc_lsize;
+ }
if (!rm7k_tcache_enabled)
return;
void __init rm7k_sc_init(void)
{
- struct cpuinfo_mips *c = ¤t_cpu_data;
unsigned int config = read_c0_config();
if ((config & RM7K_CONF_SC))
return;
- c->scache.linesz = sc_lsize;
- c->scache.ways = 4;
- c->scache.waybit= __ffs(scache_size / c->scache.ways);
- c->scache.waysize = scache_size / c->scache.ways;
- c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways);
printk(KERN_INFO "Secondary cache size %dK, linesize %d bytes.\n",
(scache_size >> 10), sc_lsize);