extern irqreturn_t crime_cpuerr_intr (int irq, void *dev_id,
struct pt_regs *regs);
-struct irqaction memerr_irq = { crime_memerr_intr, SA_INTERRUPT,
+struct irqaction memerr_irq = { crime_memerr_intr, IRQF_DISABLED,
CPU_MASK_NONE, "CRIME memory error", NULL, NULL };
-struct irqaction cpuerr_irq = { crime_cpuerr_intr, SA_INTERRUPT,
+struct irqaction cpuerr_irq = { crime_cpuerr_intr, IRQF_DISABLED,
CPU_MASK_NONE, "CRIME CPU error", NULL, NULL };
/*
#define shutdown_cpu_irq disable_cpu_irq
#define mask_and_ack_cpu_irq disable_cpu_irq
-static struct hw_interrupt_type ip32_cpu_interrupt = {
+static struct irq_chip ip32_cpu_interrupt = {
.typename = "IP32 CPU",
.startup = startup_cpu_irq,
.shutdown = shutdown_cpu_irq,
#define shutdown_crime_irq disable_crime_irq
-static struct hw_interrupt_type ip32_crime_interrupt = {
+static struct irq_chip ip32_crime_interrupt = {
.typename = "IP32 CRIME",
.startup = startup_crime_irq,
.shutdown = shutdown_crime_irq,
#define shutdown_macepci_irq disable_macepci_irq
#define mask_and_ack_macepci_irq disable_macepci_irq
-static struct hw_interrupt_type ip32_macepci_interrupt = {
+static struct irq_chip ip32_macepci_interrupt = {
.typename = "IP32 MACE PCI",
.startup = startup_macepci_irq,
.shutdown = shutdown_macepci_irq,
#define shutdown_maceisa_irq disable_maceisa_irq
-static struct hw_interrupt_type ip32_maceisa_interrupt = {
+static struct irq_chip ip32_maceisa_interrupt = {
.typename = "IP32 MACE ISA",
.startup = startup_maceisa_irq,
.shutdown = shutdown_maceisa_irq,
#define shutdown_mace_irq disable_mace_irq
#define mask_and_ack_mace_irq disable_mace_irq
-static struct hw_interrupt_type ip32_mace_interrupt = {
+static struct irq_chip ip32_mace_interrupt = {
.typename = "IP32 MACE",
.startup = startup_mace_irq,
.shutdown = shutdown_mace_irq,
mace->perif.ctrl.imask = 0;
for (irq = 0; irq <= IP32_IRQ_MAX; irq++) {
- hw_irq_controller *controller;
+ struct irq_chip *controller;
if (irq == IP32_R4K_TIMER_IRQ)
controller = &ip32_cpu_interrupt;
irq_desc[irq].status = IRQ_DISABLED;
irq_desc[irq].action = 0;
irq_desc[irq].depth = 0;
- irq_desc[irq].handler = controller;
+ irq_desc[irq].chip = controller;
}
setup_irq(CRIME_MEMERR_IRQ, &memerr_irq);
setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq);