vserver 1.9.5.x5

[linux-2.6.git] / arch / mips / sibyte / swarm / rtc_m41t81.c

diff --git a/arch/mips/sibyte/swarm/rtc_m41t81.c b/arch/mips/sibyte/swarm/rtc_m41t81.c
index b615e11..0e633ee 100644 (file)
--- a/arch/mips/sibyte/swarm/rtc_m41t81.c
+++ b/arch/mips/sibyte/swarm/rtc_m41t81.c
@@ -82,57 +82,59 @@
 #define M41T81REG_SQW  0x13            /* square wave register */
 
 #define M41T81_CCR_ADDRESS     0x68
-#define SMB_CSR(reg) (IOADDR(A_SMB_REGISTER(1, reg)))
+#define SMB_CSR(reg) ((u8 *) (IOADDR(A_SMB_REGISTER(1, reg))))
 
 static int m41t81_read(uint8_t addr)
 {
-       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
 
-       __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD));
-       __raw_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE), SMB_CSR(R_SMB_START));
+       bus_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD));
+       bus_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE),
+                  SMB_CSR(R_SMB_START));
 
-       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
 
-       __raw_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE), SMB_CSR(R_SMB_START));
+       bus_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE),
+                  SMB_CSR(R_SMB_START));
 
-       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
 
-       if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+       if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
                /* Clear error bit by writing a 1 */
-               __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+               bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
                return -1;
        }
 
-       return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
+       return (bus_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
 }
 
 static int m41t81_write(uint8_t addr, int b)
 {
-       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
 
-       __raw_writeq((addr & 0xFF), SMB_CSR(R_SMB_CMD));
-       __raw_writeq((b & 0xff), SMB_CSR(R_SMB_DATA));
-       __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
-             SMB_CSR(R_SMB_START));
+       bus_writeq((addr & 0xFF), SMB_CSR(R_SMB_CMD));
+       bus_writeq((b & 0xff), SMB_CSR(R_SMB_DATA));
+       bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
+                  SMB_CSR(R_SMB_START));
 
-       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
 
-       if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+       if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
                /* Clear error bit by writing a 1 */
-               __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+               bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
                return -1;
        } 
 
        /* read the same byte again to make sure it is written */
-       __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
-             SMB_CSR(R_SMB_START));
+       bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
+                  SMB_CSR(R_SMB_START));
 
-       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
        
        return 0;