#undef DEBUG
+#include <linux/config.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/percpu.h>
#include <asm/reg.h>
#include "pervasive.h"
-#include "cbe_regs.h"
static DEFINE_SPINLOCK(cbe_pervasive_lock);
+struct cbe_pervasive {
+ struct pmd_regs __iomem *regs;
+ unsigned int thread;
+};
+
+/* can't use per_cpu from setup_arch */
+static struct cbe_pervasive cbe_pervasive[NR_CPUS];
static void __init cbe_enable_pause_zero(void)
{
unsigned long thread_switch_control;
unsigned long temp_register;
- struct cbe_pmd_regs __iomem *pregs;
+ struct cbe_pervasive *p;
+ int thread;
spin_lock_irq(&cbe_pervasive_lock);
- pregs = cbe_get_cpu_pmd_regs(smp_processor_id());
- if (pregs == NULL)
+ p = &cbe_pervasive[smp_processor_id()];
+
+ if (!cbe_pervasive->regs)
goto out;
pr_debug("Power Management: CPU %d\n", smp_processor_id());
/* Enable Pause(0) control bit */
- temp_register = in_be64(&pregs->pm_control);
+ temp_register = in_be64(&p->regs->pm_control);
- out_be64(&pregs->pm_control,
- temp_register | CBE_PMD_PAUSE_ZERO_CONTROL);
+ out_be64(&p->regs->pm_control,
+ temp_register|PMD_PAUSE_ZERO_CONTROL);
/* Enable DEC and EE interrupt request */
thread_switch_control = mfspr(SPRN_TSC_CELL);
switch ((mfspr(SPRN_CTRLF) & CTRL_CT)) {
case CTRL_CT0:
thread_switch_control |= TSC_CELL_DEC_ENABLE_0;
+ thread = 0;
break;
case CTRL_CT1:
thread_switch_control |= TSC_CELL_DEC_ENABLE_1;
+ thread = 1;
break;
default:
printk(KERN_WARNING "%s: unknown configuration\n",
__FUNCTION__);
+ thread = -1;
break;
}
+ if (p->thread != thread)
+ printk(KERN_WARNING "%s: device tree inconsistant, "
+ "cpu %i: %d/%d\n", __FUNCTION__,
+ smp_processor_id(),
+ p->thread, thread);
+
mtspr(SPRN_TSC_CELL, thread_switch_control);
out:
{
unsigned long ctrl;
- /* Why do we do that on every idle ? Couldn't that be done once for
- * all or do we lose the state some way ? Also, the pm_control
- * register setting, that can't be set once at boot ? We really want
- * to move that away in order to implement a simple powersave
- */
cbe_enable_pause_zero();
while (1) {
timer_interrupt(regs);
break;
case SRR1_WAKEMT:
+ /* no action required */
break;
-#ifdef CONFIG_CBE_RAS
- case SRR1_WAKESYSERR:
- cbe_system_error_exception(regs);
- break;
- case SRR1_WAKETHERM:
- cbe_thermal_exception(regs);
- break;
-#endif /* CONFIG_CBE_RAS */
default:
/* do system reset */
return 0;
return 1;
}
-void __init cbe_pervasive_init(void)
+static int __init cbe_find_pmd_mmio(int cpu, struct cbe_pervasive *p)
+{
+ struct device_node *node;
+ unsigned int *int_servers;
+ char *addr;
+ unsigned long real_address;
+ unsigned int size;
+
+ struct pmd_regs __iomem *pmd_mmio_area;
+ int hardid, thread;
+ int proplen;
+
+ pmd_mmio_area = NULL;
+ hardid = get_hard_smp_processor_id(cpu);
+ for (node = NULL; (node = of_find_node_by_type(node, "cpu"));) {
+ int_servers = (void *) get_property(node,
+ "ibm,ppc-interrupt-server#s", &proplen);
+ if (!int_servers) {
+ printk(KERN_WARNING "%s misses "
+ "ibm,ppc-interrupt-server#s property",
+ node->full_name);
+ continue;
+ }
+ for (thread = 0; thread < proplen / sizeof (int); thread++) {
+ if (hardid == int_servers[thread]) {
+ addr = get_property(node, "pervasive", NULL);
+ goto found;
+ }
+ }
+ }
+
+ printk(KERN_WARNING "%s: CPU %d not found\n", __FUNCTION__, cpu);
+ return -EINVAL;
+
+found:
+ real_address = *(unsigned long*) addr;
+ addr += sizeof (unsigned long);
+ size = *(unsigned int*) addr;
+
+ pr_debug("pervasive area for CPU %d at %lx, size %x\n",
+ cpu, real_address, size);
+ p->regs = __ioremap(real_address, size, _PAGE_NO_CACHE);
+ p->thread = thread;
+ return 0;
+}
+
+void __init cell_pervasive_init(void)
{
+ struct cbe_pervasive *p;
+ int cpu;
+ int ret;
+
if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO))
return;
+ for_each_cpu(cpu) {
+ p = &cbe_pervasive[cpu];
+ ret = cbe_find_pmd_mmio(cpu, p);
+ if (ret)
+ return;
+ }
+
ppc_md.idle_loop = cbe_idle;
ppc_md.system_reset_exception = cbe_system_reset_exception;
}