#include <linux/string.h>
#include <linux/init.h>
#include <linux/bootmem.h>
-#include <linux/irq.h>
#include <asm/sections.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/pmac_feature.h>
#include <asm/grackle.h>
+#ifdef CONFIG_PPC64
+//#include <asm/iommu.h>
#include <asm/ppc-pci.h>
+#endif
#undef DEBUG
static struct pci_controller *u3_agp;
static struct pci_controller *u4_pcie;
static struct pci_controller *u3_ht;
-#else
-static int has_second_ohare;
#endif /* CONFIG_PPC64 */
extern u8 pci_cache_line_size;
early_write_config_word(hose, bus, devfn, PCI_BRIDGE_CONTROL, val);
}
-static void __init init_second_ohare(void)
-{
- struct device_node *np = of_find_node_by_name(NULL, "pci106b,7");
- unsigned char bus, devfn;
- unsigned short cmd;
-
- if (np == NULL)
- return;
-
- /* This must run before we initialize the PICs since the second
- * ohare hosts a PIC that will be accessed there.
- */
- if (pci_device_from_OF_node(np, &bus, &devfn) == 0) {
- struct pci_controller* hose =
- pci_find_hose_for_OF_device(np);
- if (!hose) {
- printk(KERN_ERR "Can't find PCI hose for OHare2 !\n");
- return;
- }
- early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd);
- cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
- cmd &= ~PCI_COMMAND_IO;
- early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd);
- }
- has_second_ohare = 1;
-}
-
/*
* Some Apple desktop machines have a NEC PD720100A USB2 controller
* on the motherboard. Open Firmware, on these, will disable the
" EHCI, fixing up...\n");
data &= ~1UL;
early_write_config_dword(hose, bus, devfn, 0xe4, data);
+ early_write_config_byte(hose, bus,
+ devfn | 2, PCI_INTERRUPT_LINE,
+ nec->intrs[0].line);
}
}
}
disp_name = "Chaos";
primary = 0;
}
- printk(KERN_INFO "Found %s PCI host bridge at 0x%016llx. "
+ printk(KERN_INFO "Found %s PCI host bridge at 0x%08lx. "
"Firmware bus number: %d->%d\n",
- disp_name, (unsigned long long)rsrc.start, hose->first_busno,
- hose->last_busno);
+ disp_name, rsrc.start, hose->first_busno, hose->last_busno);
#endif /* CONFIG_PPC32 */
DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
return 0;
}
-void __init pmac_pcibios_fixup(void)
+static void __init pcibios_fixup_OF_interrupts(void)
{
struct pci_dev* dev = NULL;
+ /*
+ * Open Firmware often doesn't initialize the
+ * PCI_INTERRUPT_LINE config register properly, so we
+ * should find the device node and apply the interrupt
+ * obtained from the OF device-tree
+ */
for_each_pci_dev(dev) {
- /* Read interrupt from the device-tree */
- pci_read_irq_line(dev);
-
-#ifdef CONFIG_PPC32
- /* Fixup interrupt for the modem/ethernet combo controller.
- * on machines with a second ohare chip.
- * The number in the device tree (27) is bogus (correct for
- * the ethernet-only board but not the combo ethernet/modem
- * board). The real interrupt is 28 on the second controller
- * -> 28+32 = 60.
- */
- if (has_second_ohare &&
- dev->vendor == PCI_VENDOR_ID_DEC &&
- dev->device == PCI_DEVICE_ID_DEC_TULIP_PLUS) {
- dev->irq = irq_create_mapping(NULL, 60);
- set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW);
- }
-#endif /* CONFIG_PPC32 */
+ struct device_node *node;
+ node = pci_device_to_OF_node(dev);
+ /* this is the node, see if it has interrupts */
+ if (node && node->n_intrs > 0)
+ dev->irq = node->intrs[0].line;
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
}
}
+void __init pmac_pcibios_fixup(void)
+{
+ /* Fixup interrupts according to OF tree */
+ pcibios_fixup_OF_interrupts();
+}
+
#ifdef CONFIG_PPC64
static void __init pmac_fixup_phb_resources(void)
{
/* Tell pci.c to not use the common resource allocation mechanism */
pci_probe_only = 1;
+ /* Allow all IO */
+ io_page_mask = -1;
+
#else /* CONFIG_PPC64 */
init_p2pbridge();
- init_second_ohare();
fixup_nec_usb2();
/* We are still having some issues with the Xserve G4, enabling
* (iBook second controller)
*/
if (dev->vendor == PCI_VENDOR_ID_APPLE
- && dev->class == PCI_CLASS_SERIAL_USB_OHCI
+ && (dev->class == ((PCI_CLASS_SERIAL_USB << 8) | 0x10))
&& !node) {
printk(KERN_INFO "Apple USB OHCI %s disabled by firmware\n",
pci_name(dev));
#ifdef CONFIG_PPC32
void pmac_pci_fixup_cardbus(struct pci_dev* dev)
{
- if (!machine_is(powermac))
+ if (_machine != _MACH_Pmac)
return;
/*
* Fix the interrupt routing on the various cardbus bridges
* On PowerMacs, we try to switch any PCI ATA controller to
* fully native mode
*/
- if (!machine_is(powermac))
+ if (_machine != _MACH_Pmac)
return;
-
/* Some controllers don't have the class IDE */
if (dev->vendor == PCI_VENDOR_ID_PROMISE)
switch(dev->device) {
git://git.onelab.eu / linux-2.6.git / blobdiff