patch-2_6_7-vs1_9_1_12

[linux-2.6.git] / arch / ppc / platforms / 4xx / ibm440gx.h

diff --git a/arch/ppc/platforms/4xx/ibm440gx.h b/arch/ppc/platforms/4xx/ibm440gx.h
index 50c16a0..0b59d8d 100644 (file)
--- a/arch/ppc/platforms/4xx/ibm440gx.h
+++ b/arch/ppc/platforms/4xx/ibm440gx.h
@@ -26,53 +26,8 @@
 /* UART */
 #define PPC440GX_UART0_ADDR    0x0000000140000200ULL
 #define PPC440GX_UART1_ADDR    0x0000000140000300ULL
-#define UART0_IRQ              0
-#define UART1_IRQ              1
-
-/* EMAC */
-#define PPC440GX_EMAC0_ADDR    0x0000000140000800ULL
-#define PPC440GX_EMAC1_ADDR    0x0000000140000900ULL
-#define PPC440GX_EMAC2_ADDR    0x0000000140000C00ULL
-#define PPC440GX_EMAC3_ADDR    0x0000000140000E00ULL
-#define PPC440GX_EMAC_SIZE     0xFC
-#define EMAC_NUMS               2
-#define BL_MAC_WOL     61      /* WOL */
-#define BL_MAC_WOL1    63      /* WOL */
-#define BL_MAC_WOL2    65      /* WOL */
-#define BL_MAC_WOL3    67      /* WOL */
-#define BL_MAL_SERR    32      /* MAL SERR */
-#define BL_MAL_TXDE    33      /* MAL TXDE */
-#define BL_MAL_RXDE    34      /* MAL RXDE */
-#define BL_MAL_TXEOB   10      /* MAL TX EOB */
-#define BL_MAL_RXEOB   11      /* MAL RX EOB */
-#define BL_MAC_ETH0    60      /* MAC */
-#define BL_MAC_ETH1    62      /* MAC */
-#define BL_MAC_ETH2    64      /* MAC */
-#define BL_MAC_ETH3    66      /* MAC */
-#define BL_TAH0                68      /* TAH 0 */
-#define BL_TAH1                69      /* TAH 1 */
-
-/* TAH */
-#define PPC440GX_TAH0_ADDR     0x0000000140000B00ULL
-#define PPC440GX_TAH1_ADDR     0x0000000140000D00ULL
-#define PPC440GX_TAH_SIZE      0xFC
-
-/* ZMII */
-#define PPC440GX_ZMII_ADDR     0x0000000140000780ULL
-#define PPC440GX_ZMII_SIZE     0x0c
-
-/* RGMII */
-#define PPC440GX_RGMII_ADDR    0x0000000140000790ULL
-#define PPC440GX_RGMII_SIZE    0x0c
-
-/* IIC  */
-#define PPC440GX_IIC0_ADDR     0x40000400
-#define PPC440GX_IIC1_ADDR     0x40000500
-#define IIC0_IRQ               2
-#define IIC1_IRQ               3
-
-/* GPIO */
-#define PPC440GX_GPIO0_ADDR    0x0000000140000700ULL
+#define UART0_INT              0
+#define UART1_INT              1
 
 /* Clock and Power Management */
 #define IBM_CPM_IIC0           0x80000000      /* IIC interface */
@@ -110,10 +65,6 @@
                                | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \
                                | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \
                                | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 )
-
-/* OPB */
-#define PPC440GX_OPB_BASE_START        0x0000000140000000ULL
-
 /*
  * Serial port defines
  */