vserver 1.9.5.x5

[linux-2.6.git] / arch / ppc / platforms / 85xx / mpc8540_ads.c

diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c
index 686dd6d..fca01e6 100644 (file)
--- a/arch/ppc/platforms/85xx/mpc8540_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8540_ads.c
@@ -32,6 +32,7 @@
 #include <linux/serial_core.h>
 #include <linux/initrd.h>
 #include <linux/module.h>
+#include <linux/fsl_devices.h>
 
 #include <asm/system.h>
 #include <asm/pgtable.h>
@@ -48,50 +49,11 @@
 #include <asm/irq.h>
 #include <asm/immap_85xx.h>
 #include <asm/kgdb.h>
-#include <asm/ocp.h>
+#include <asm/ppc_sys.h>
 #include <mm/mmu_decl.h>
 
-#include <syslib/ppc85xx_common.h>
 #include <syslib/ppc85xx_setup.h>
 
-struct ocp_gfar_data mpc85xx_tsec1_def = {
-       .interruptTransmit = MPC85xx_IRQ_TSEC1_TX,
-       .interruptError = MPC85xx_IRQ_TSEC1_ERROR,
-       .interruptReceive = MPC85xx_IRQ_TSEC1_RX,
-       .interruptPHY = MPC85xx_IRQ_EXT5,
-       .flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR
-                       | GFAR_HAS_RMON
-                       | GFAR_HAS_PHY_INTR | GFAR_HAS_COALESCE),
-       .phyid = 0,
-       .phyregidx = 0,
-};
-
-struct ocp_gfar_data mpc85xx_tsec2_def = {
-       .interruptTransmit = MPC85xx_IRQ_TSEC2_TX,
-       .interruptError = MPC85xx_IRQ_TSEC2_ERROR,
-       .interruptReceive = MPC85xx_IRQ_TSEC2_RX,
-       .interruptPHY = MPC85xx_IRQ_EXT5,
-       .flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR
-                       | GFAR_HAS_RMON
-                       | GFAR_HAS_PHY_INTR | GFAR_HAS_COALESCE),
-       .phyid = 1,
-       .phyregidx = 0,
-};
-
-struct ocp_gfar_data mpc85xx_fec_def = {
-       .interruptTransmit = MPC85xx_IRQ_FEC,
-       .interruptError = MPC85xx_IRQ_FEC,
-       .interruptReceive = MPC85xx_IRQ_FEC,
-       .interruptPHY = MPC85xx_IRQ_EXT5,
-       .flags = 0,
-       .phyid = 3,
-       .phyregidx = 0,
-};
-
-struct ocp_fs_i2c_data mpc85xx_i2c1_def = {
-       .flags = FS_I2C_SEPARATE_DFSRR,
-};
-
 /* ************************************************************************
  *
  * Setup the architecture
@@ -100,10 +62,9 @@ struct ocp_fs_i2c_data mpc85xx_i2c1_def = {
 static void __init
 mpc8540ads_setup_arch(void)
 {
-       struct ocp_def *def;
-       struct ocp_gfar_data *einfo;
        bd_t *binfo = (bd_t *) __res;
        unsigned int freq;
+       struct gianfar_platform_data *pdata;
 
        /* get the core frequency */
        freq = binfo->bi_intfreq;
@@ -130,23 +91,30 @@ mpc8540ads_setup_arch(void)
        invalidate_tlbcam_entry(NUM_TLBCAMS - 1);
 #endif
 
-       def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 0);
-       if (def) {
-               einfo = (struct ocp_gfar_data *) def->additions;
-               memcpy(einfo->mac_addr, binfo->bi_enetaddr, 6);
-       }
-
-       def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 1);
-       if (def) {
-               einfo = (struct ocp_gfar_data *) def->additions;
-               memcpy(einfo->mac_addr, binfo->bi_enet1addr, 6);
-       }
-
-       def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 2);
-       if (def) {
-               einfo = (struct ocp_gfar_data *) def->additions;
-               memcpy(einfo->mac_addr, binfo->bi_enet2addr, 6);
-       }
+       /* setup the board related information for the enet controllers */
+       pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
+       pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+       pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+       pdata->phyid = 0;
+       /* fixup phy address */
+       pdata->phy_reg_addr += binfo->bi_immr_base;
+       memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+
+       pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
+       pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+       pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+       pdata->phyid = 1;
+       /* fixup phy address */
+       pdata->phy_reg_addr += binfo->bi_immr_base;
+       memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+
+       pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
+       pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+       pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+       pdata->phyid = 3;
+       /* fixup phy address */
+       pdata->phy_reg_addr += binfo->bi_immr_base;
+       memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
 
 #ifdef CONFIG_BLK_DEV_INITRD
        if (initrd_start)
@@ -158,8 +126,6 @@ mpc8540ads_setup_arch(void)
 #else
                ROOT_DEV = Root_HDA1;
 #endif
-
-       ocp_for_each_device(mpc85xx_update_paddr_ocp, &(binfo->bi_immr_base));
 }
 
 /* ************************************************************************ */
@@ -181,10 +147,25 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #ifdef CONFIG_SERIAL_TEXT_DEBUG
        {
                bd_t *binfo = (bd_t *) __res;
+               struct uart_port p;
 
                /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
                settlbcam(NUM_TLBCAMS - 1, binfo->bi_immr_base,
                          binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
+
+               memset(&p, 0, sizeof (p));
+               p.iotype = SERIAL_IO_MEM;
+               p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
+               p.uartclk = binfo->bi_busfreq;
+
+               gen550_init(0, &p);
+
+               memset(&p, 0, sizeof (p));
+               p.iotype = SERIAL_IO_MEM;
+               p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
+               p.uartclk = binfo->bi_busfreq;
+
+               gen550_init(1, &p);
        }
 #endif
 
@@ -206,6 +187,8 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
                strcpy(cmd_line, (char *) (r6 + KERNELBASE));
        }
 
+       identify_ppc_sys_by_id(mfspr(SVR));
+
        /* setup the PowerPC module struct */
        ppc_md.setup_arch = mpc8540ads_setup_arch;
        ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;