linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / arch / ppc / platforms / chrp_pci.c

diff --git a/arch/ppc/platforms/chrp_pci.c b/arch/ppc/platforms/chrp_pci.c
index 7d0ee30..c7fe618 100644 (file)
--- a/arch/ppc/platforms/chrp_pci.c
+++ b/arch/ppc/platforms/chrp_pci.c
@@ -9,7 +9,6 @@
 #include <linux/string.h>
 #include <linux/init.h>
 #include <linux/ide.h>
-#include <linux/bootmem.h>
 
 #include <asm/io.h>
 #include <asm/pgtable.h>
@@ -30,7 +29,7 @@ void __iomem *gg2_pci_config_base;
  * limit the bus number to 3 bits
  */
 
-int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
+int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
                           int len, u32 *val)
 {
        volatile void __iomem *cfg_data;
@@ -57,7 +56,7 @@ int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
        return PCIBIOS_SUCCESSFUL;
 }
 
-int __chrp gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
+int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
                            int len, u32 val)
 {
        volatile void __iomem *cfg_data;
@@ -93,7 +92,7 @@ static struct pci_ops gg2_pci_ops =
 /*
  * Access functions for PCI config space using RTAS calls.
  */
-int __chrp
+int
 rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
                 int len, u32 *val)
 {
@@ -109,7 +108,7 @@ rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
        return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
 }
 
-int __chrp
+int
 rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
                  int len, u32 val)
 {
@@ -204,7 +203,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d
                printk ("RTAS supporting Pegasos OF not found, please upgrade"
                        " your firmware\n");
        }
-       pci_assign_all_busses = 1;
+       pci_assign_all_buses = 1;
 }
 
 void __init
@@ -276,7 +275,7 @@ chrp_find_bridges(void)
                        setup_python(hose, dev);
                } else if (is_mot
                           || strncmp(model, "Motorola, Grackle", 17) == 0) {
-                       setup_grackle(hose);
+                       setup_indirect_pci(hose, 0xfec00000, 0xfee00000);
                } else if (is_longtrail) {
                        void __iomem *p = ioremap(GG2_PCI_CONFIG_BASE, 0x80000);
                        hose->ops = &gg2_pci_ops;