vserver 2.0 rc7
[linux-2.6.git] / arch / ppc / platforms / lite5200.c
index db6ea44..b604cf8 100644 (file)
@@ -13,7 +13,7 @@
  * Dale Farnsworth <dale.farnsworth@mvista.com> and
  * Wolfgang Denk <wd@denx.de>
  * 
- * Copyright 2004 Sylvain Munaut <tnt@246tNt.com>
+ * Copyright 2004-2005 Sylvain Munaut <tnt@246tNt.com>
  * Copyright 2003 Motorola Inc.
  * Copyright 2003 MontaVista Software Inc.
  * Copyright 2003 DENX Software Engineering (wd@denx.de)
 #include <linux/kdev_t.h>
 #include <linux/root_dev.h>
 #include <linux/console.h>
+#include <linux/module.h>
 
 #include <asm/bootinfo.h>
 #include <asm/io.h>
-#include <asm/ocp.h>
 #include <asm/mpc52xx.h>
+#include <asm/ppc_sys.h>
+
+#include <syslib/mpc52xx_pci.h>
 
 
 extern int powersave_nap;
@@ -44,34 +47,20 @@ EXPORT_SYMBOL(__res);       /* For modules */
 
 
 /* ======================================================================== */
-/* OCP device definition                                                    */
-/* For board/shared resources like PSCs                                     */
+/* Platform specific code                                                   */
 /* ======================================================================== */
-/* Be sure not to load conficting devices : e.g. loading the UART drivers for
- * PSC1 and then also loading a AC97 for this same PSC.
- * For details about how to create an entry, look in the doc of the concerned
- * driver ( eg drivers/serial/mpc52xx_uart.c for the PSC in uart mode )
- */
 
-struct ocp_def board_ocp[] = {
-       {
-               .vendor         = OCP_VENDOR_FREESCALE,
-               .function       = OCP_FUNC_PSC_UART,
-               .index          = 0,
-               .paddr          = MPC52xx_PSC1,
-               .irq            = MPC52xx_PSC1_IRQ,
-               .pm             = OCP_CPM_NA,
-       },
-       {       /* Terminating entry */
-               .vendor         = OCP_VENDOR_INVALID
-       }
-};
+/* Supported PSC function in "preference" order */
+struct mpc52xx_psc_func mpc52xx_psc_functions[] = {
+               {       .id     = 0,
+                       .func   = "uart",
+               },
+               {       .id     = -1,   /* End entry */
+                       .func   = NULL,
+               }
+       };
 
 
-/* ======================================================================== */
-/* Platform specific code                                                   */
-/* ======================================================================== */
-
 static int
 lite5200_show_cpuinfo(struct seq_file *m)
 {
@@ -79,22 +68,66 @@ lite5200_show_cpuinfo(struct seq_file *m)
        return 0;
 }
 
+#ifdef CONFIG_PCI
+static int
+lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
+{
+       return (pin == 1) && (idsel==24) ? MPC52xx_IRQ0 : -1;
+}
+#endif
+
 static void __init
 lite5200_setup_cpu(void)
 {
-       struct mpc52xx_intr *intr;
+       struct mpc52xx_cdm  __iomem *cdm;
+       struct mpc52xx_gpio __iomem *gpio;
+       struct mpc52xx_intr __iomem *intr;
+       struct mpc52xx_xlb  __iomem *xlb;
 
+       u32 port_config;
        u32 intr_ctrl;
 
        /* Map zones */
-       intr = (struct mpc52xx_intr *)
-               ioremap(MPC52xx_INTR,sizeof(struct mpc52xx_intr));
-
-       if (!intr) {
-               printk("lite5200.c: Error while mapping INTR during lite5200_setup_cpu\n");
+       cdm  = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
+       gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
+       xlb  = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE);
+       intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
+
+       if (!cdm || !gpio || !xlb || !intr) {
+               printk("lite5200.c: Error while mapping CDM/GPIO/XLB/INTR during"
+                               "lite5200_setup_cpu\n");
                goto unmap_regs;
        }
 
+       /* Use internal 48 Mhz */
+       out_8(&cdm->ext_48mhz_en, 0x00);
+       out_8(&cdm->fd_enable, 0x01);
+       if (in_be32(&cdm->rstcfg) & 0x40)       /* Assumes 33Mhz clock */
+               out_be16(&cdm->fd_counters, 0x0001);
+       else
+               out_be16(&cdm->fd_counters, 0x5555);
+
+       /* Get port mux config */
+       port_config = in_be32(&gpio->port_config);
+
+       /* 48Mhz internal, pin is GPIO */
+       port_config &= ~0x00800000;
+
+       /* USB port */
+       port_config &= ~0x00007000;     /* Differential mode - USB1 only */
+       port_config |=  0x00001000;
+
+       /* Commit port config */
+       out_be32(&gpio->port_config, port_config);
+
+       /* Configure the XLB Arbiter */
+       out_be32(&xlb->master_pri_enable, 0xff);
+       out_be32(&xlb->master_priority, 0x11111111);
+
+       /* Enable ram snooping for 1GB window */
+       out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);
+       out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
+
        /* IRQ[0-3] setup : IRQ0     - Level Active Low  */
        /*                  IRQ[1-3] - Level Active High */
        intr_ctrl = in_be32(&intr->ctrl);
@@ -104,17 +137,22 @@ lite5200_setup_cpu(void)
 
        /* Unmap reg zone */
 unmap_regs:
+       if (cdm)  iounmap(cdm);
+       if (gpio) iounmap(gpio);
+       if (xlb)  iounmap(xlb);
        if (intr) iounmap(intr);
 }
 
 static void __init
 lite5200_setup_arch(void)
 {
-       /* Add board OCP definitions */
-       mpc52xx_add_board_devices(board_ocp);
-
        /* CPU & Port mux setup */
        lite5200_setup_cpu();
+
+#ifdef CONFIG_PCI
+       /* PCI Bridge setup */
+       mpc52xx_find_bridges();
+#endif
 }
 
 void __init
@@ -150,15 +188,22 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
                }
        }
 
+       /* PPC Sys identification */
+       identify_ppc_sys_by_id(mfspr(SPRN_SVR));
+
        /* BAT setup */
        mpc52xx_set_bat();
 
-       /* No ISA bus AFAIK */
+       /* No ISA bus by default */
        isa_io_base             = 0;
        isa_mem_base            = 0;
 
        /* Powersave */
-       powersave_nap = 1;      /* We allow this platform to NAP */
+       /* This is provided as an example on how to do it. But you
+          need to be aware that NAP disable bus snoop and that may
+          be required for some devices to work properly, like USB ... */
+       /* powersave_nap = 1; */
+
 
        /* Setup the ppc_md struct */
        ppc_md.setup_arch       = lite5200_setup_arch;
@@ -167,6 +212,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
        ppc_md.init_IRQ         = mpc52xx_init_irq;
        ppc_md.get_irq          = mpc52xx_get_irq;
 
+#ifdef CONFIG_PCI
+       ppc_md.pci_map_irq      = lite5200_map_irq;
+#endif
+
        ppc_md.find_end_of_memory = mpc52xx_find_end_of_memory;
        ppc_md.setup_io_mappings  = mpc52xx_map_io;