vserver 1.9.5.x5

[linux-2.6.git] / arch / ppc / syslib / indirect_pci.c

diff --git a/arch/ppc/syslib/indirect_pci.c b/arch/ppc/syslib/indirect_pci.c
index 4bc90eb..a5a7526 100644 (file)
--- a/arch/ppc/syslib/indirect_pci.c
+++ b/arch/ppc/syslib/indirect_pci.c
@@ -32,7 +32,7 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
                     int len, u32 *val)
 {
        struct pci_controller *hose = bus->sysdata;
-       volatile unsigned char *cfg_data;
+       volatile void __iomem *cfg_data;
        u8 cfg_type = 0;
 
        if (ppc_md.pci_exclude_device)
@@ -54,13 +54,13 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
        cfg_data = hose->cfg_data + (offset & 3);
        switch (len) {
        case 1:
-               *val = in_8((u8 *)cfg_data);
+               *val = in_8(cfg_data);
                break;
        case 2:
-               *val = in_le16((u16 *)cfg_data);
+               *val = in_le16(cfg_data);
                break;
        default:
-               *val = in_le32((u32 *)cfg_data);
+               *val = in_le32(cfg_data);
                break;
        }
        return PCIBIOS_SUCCESSFUL;
@@ -71,7 +71,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
                      int len, u32 val)
 {
        struct pci_controller *hose = bus->sysdata;
-       volatile unsigned char *cfg_data;
+       volatile void __iomem *cfg_data;
        u8 cfg_type = 0;
 
        if (ppc_md.pci_exclude_device)
@@ -93,13 +93,13 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
        cfg_data = hose->cfg_data + (offset & 3);
        switch (len) {
        case 1:
-               out_8((u8 *)cfg_data, val);
+               out_8(cfg_data, val);
                break;
        case 2:
-               out_le16((u16 *)cfg_data, val);
+               out_le16(cfg_data, val);
                break;
        default:
-               out_le32((u32 *)cfg_data, val);
+               out_le32(cfg_data, val);
                break;
        }
        return PCIBIOS_SUCCESSFUL;
@@ -111,16 +111,25 @@ static struct pci_ops indirect_pci_ops =
        indirect_write_config
 };
 
+void __init
+setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr,
+       void __iomem * cfg_data)
+{
+       hose->cfg_addr = cfg_addr;
+       hose->cfg_data = cfg_data;
+       hose->ops = &indirect_pci_ops;
+}
+
 void __init
 setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
 {
        unsigned long base = cfg_addr & PAGE_MASK;
-       char *mbase;
+       void __iomem *mbase, *addr, *data;
 
        mbase = ioremap(base, PAGE_SIZE);
-       hose->cfg_addr = (unsigned int *)(mbase + (cfg_addr & ~PAGE_MASK));
+       addr = mbase + (cfg_addr & ~PAGE_MASK);
        if ((cfg_data & PAGE_MASK) != base)
                mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
-       hose->cfg_data = (unsigned char *)(mbase + (cfg_data & ~PAGE_MASK));
-       hose->ops = &indirect_pci_ops;
+       data = mbase + (cfg_data & ~PAGE_MASK);
+       setup_indirect_pci_nomap(hose, addr, data);
 }