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[linux-2.6.git] / arch / ppc / syslib / mpc10x_common.c

diff --git a/arch/ppc/syslib/mpc10x_common.c b/arch/ppc/syslib/mpc10x_common.c
index 153c811..80c7150 100644 (file)
--- a/arch/ppc/syslib/mpc10x_common.c
+++ b/arch/ppc/syslib/mpc10x_common.c
@@ -30,60 +30,7 @@
 #include <asm/pci-bridge.h>
 #include <asm/open_pic.h>
 #include <asm/mpc10x.h>
-#include <asm/ocp.h>
-
-/* The OCP structure is fixed by code below, before OCP initialises.
-   paddr depends on where the board places the EUMB.
-    - fixed in mpc10x_bridge_init().
-   irq depends on two things:
-    > does the board use the EPIC at all? (PCORE does not).
-    > is the EPIC in serial or parallel mode?
-    - fixed in mpc10x_set_openpic().
-*/
-
-#ifdef CONFIG_MPC10X_OPENPIC
-#ifdef CONFIG_EPIC_SERIAL_MODE
-#define EPIC_IRQ_BASE 16
-#else
-#define EPIC_IRQ_BASE 5
-#endif
-#define MPC10X_I2C_IRQ (EPIC_IRQ_BASE + NUM_8259_INTERRUPTS)
-#define MPC10X_DMA0_IRQ (EPIC_IRQ_BASE + 1 + NUM_8259_INTERRUPTS)
-#define MPC10X_DMA1_IRQ (EPIC_IRQ_BASE + 2 + NUM_8259_INTERRUPTS)
-#else
-#define MPC10X_I2C_IRQ OCP_IRQ_NA
-#define MPC10X_DMA0_IRQ OCP_IRQ_NA
-#define MPC10X_DMA1_IRQ OCP_IRQ_NA
-#endif
-
 
-struct ocp_def core_ocp[] = {
-       { .vendor       = OCP_VENDOR_INVALID
-       }
-};
-
-static struct ocp_fs_i2c_data mpc10x_i2c_data = {
-       .flags          = 0
-};
-static struct ocp_def mpc10x_i2c_ocp = {
-       .vendor         = OCP_VENDOR_MOTOROLA,
-       .function       = OCP_FUNC_IIC,
-       .index          = 0,
-       .irq            = MPC10X_I2C_IRQ,
-       .additions      = &mpc10x_i2c_data
-};
-
-static struct ocp_def mpc10x_dma_ocp[2] = {
-{      .vendor         = OCP_VENDOR_MOTOROLA,
-       .function       = OCP_FUNC_DMA,
-       .index          = 0,
-       .irq            = MPC10X_DMA0_IRQ
-},
-{      .vendor         = OCP_VENDOR_MOTOROLA,
-       .function       = OCP_FUNC_DMA,
-       .index          = 1,
-       .irq            = MPC10X_DMA1_IRQ }
-};
 
 /* Set resources to match bridge memory map */
 void __init
@@ -284,21 +231,11 @@ mpc10x_bridge_init(struct pci_controller *hose,
                                         PCI_DEVFN(0,0),
                                         MPC10X_CFG_EUMBBAR,
                                         phys_eumb_base);
-#ifdef CONFIG_MPC10X_OPENPIC
-               /* Map EPIC register part of EUMB into vitual memory  - PCORE
-                  uses an i8259 instead of EPIC. */
+
+               /* Map EPIC register part of EUMB into vitual memory */
                OpenPIC_Addr =
                        ioremap(phys_eumb_base + MPC10X_EUMB_EPIC_OFFSET,
                                MPC10X_EUMB_EPIC_SIZE);
-#endif
-               mpc10x_i2c_ocp.paddr = phys_eumb_base + MPC10X_EUMB_I2C_OFFSET;
-               ocp_add_one_device(&mpc10x_i2c_ocp);
-               mpc10x_dma_ocp[0].paddr = phys_eumb_base +
-                                       MPC10X_EUMB_DMA_OFFSET + 0x100;
-               ocp_add_one_device(&mpc10x_dma_ocp[0]);
-               mpc10x_dma_ocp[1].paddr = phys_eumb_base +
-                                       MPC10X_EUMB_DMA_OFFSET + 0x200;
-               ocp_add_one_device(&mpc10x_dma_ocp[1]);
        }
 
 #ifdef CONFIG_MPC10X_STORE_GATHERING
@@ -460,17 +397,3 @@ mpc10x_disable_store_gathering(struct pci_controller *hose)
 
        return 0;
 }
-
-#ifdef CONFIG_MPC10X_OPENPIC
-void __init mpc10x_set_openpic(void)
-{
-       /* Map external IRQs */
-       openpic_set_sources(0, EPIC_IRQ_BASE, OpenPIC_Addr + 0x10200);
-       /* Skip reserved space and map i2c and DMA Ch[01] */
-       openpic_set_sources(EPIC_IRQ_BASE, 3, OpenPIC_Addr + 0x11020);
-       /* Skip reserved space and map Message Unit Interrupt (I2O) */
-       openpic_set_sources(EPIC_IRQ_BASE + 3, 1, OpenPIC_Addr + 0x110C0);
-
-       openpic_init(NUM_8259_INTERRUPTS);
-}
-#endif