#include "open_pic.h"
#include "pci.h"
-/* legal IO pages under MAX_ISA_PORT. This is to ensure we don't touch
- devices we don't have access to. */
-unsigned long io_page_mask;
-
-EXPORT_SYMBOL(io_page_mask);
-
/* RTAS tokens */
static int read_pci_config;
static int write_pci_config;
int ret;
if (!dn)
- return -2;
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ if (where & (size - 1))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
addr = (dn->busno << 16) | (dn->devfn << 8) | where;
buid = dn->phb->buid;
ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
}
*val = returnval;
- return ret;
+
+ if (ret)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ if (returnval == EEH_IO_ERROR_VALUE(size)
+ && eeh_dn_check_failure (dn, NULL))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ return PCIBIOS_SUCCESSFUL;
}
static int rtas_pci_read_config(struct pci_bus *bus,
int ret;
if (!dn)
- return -2;
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ if (where & (size - 1))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
addr = (dn->busno << 16) | (dn->devfn << 8) | where;
buid = dn->phb->buid;
} else {
ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
}
- return ret;
+
+ if (ret)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ return PCIBIOS_SUCCESSFUL;
}
static int rtas_pci_write_config(struct pci_bus *bus,
rtas_pci_write_config
};
-/******************************************************************
- * pci_read_irq_line
- *
- * Reads the Interrupt Pin to determine if interrupt is use by card.
- * If the interrupt is used, then gets the interrupt line from the
- * openfirmware and sets it in the pci_dev and pci_config line.
- *
- ******************************************************************/
-int pci_read_irq_line(struct pci_dev *pci_dev)
-{
- u8 intpin;
- struct device_node *node;
-
- pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &intpin);
-
- if (intpin == 0) {
- PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s No Interrupt used by device.\n", pci_name(pci_dev));
- return 0;
- }
-
- node = pci_device_to_OF_node(pci_dev);
- if (node == NULL) {
- PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s Device Node not found.\n",
- pci_name(pci_dev));
- return -1;
- }
- if (node->n_intrs == 0) {
- PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s No Device OF interrupts defined.\n", pci_name(pci_dev));
- return -1;
- }
- pci_dev->irq = node->intrs[0].line;
-
- if (s7a_workaround) {
- if (pci_dev->irq > 16)
- pci_dev->irq -= 3;
- }
-
- pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, pci_dev->irq);
-
- PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s pci_dev->irq = 0x%02X\n",
- pci_name(pci_dev), pci_dev->irq);
- return 0;
-}
-EXPORT_SYMBOL(pci_read_irq_line);
-
-#define ISA_SPACE_MASK 0x1
-#define ISA_SPACE_IO 0x1
-
-static void pci_process_ISA_OF_ranges(struct device_node *isa_node,
- unsigned long phb_io_base_phys,
- void * phb_io_base_virt)
-{
- struct isa_range *range;
- unsigned long pci_addr;
- unsigned int isa_addr;
- unsigned int size;
- int rlen = 0;
-
- range = (struct isa_range *) get_property(isa_node, "ranges", &rlen);
- if (rlen < sizeof(struct isa_range)) {
- printk(KERN_ERR "unexpected isa range size: %s\n",
- __FUNCTION__);
- return;
- }
-
- /* From "ISA Binding to 1275"
- * The ranges property is laid out as an array of elements,
- * each of which comprises:
- * cells 0 - 1: an ISA address
- * cells 2 - 4: a PCI address
- * (size depending on dev->n_addr_cells)
- * cell 5: the size of the range
- */
- if ((range->isa_addr.a_hi && ISA_SPACE_MASK) == ISA_SPACE_IO) {
- isa_addr = range->isa_addr.a_lo;
- pci_addr = (unsigned long) range->pci_addr.a_mid << 32 |
- range->pci_addr.a_lo;
-
- /* Assume these are both zero */
- if ((pci_addr != 0) || (isa_addr != 0)) {
- printk(KERN_ERR "unexpected isa to pci mapping: %s\n",
- __FUNCTION__);
- return;
- }
-
- size = PAGE_ALIGN(range->size);
-
- __ioremap_explicit(phb_io_base_phys,
- (unsigned long) phb_io_base_virt,
- size, _PAGE_NO_CACHE);
- }
-}
-
-static void __init pci_process_bridge_OF_ranges(struct pci_controller *hose,
- struct device_node *dev,
- int primary)
-{
- unsigned int *ranges;
- unsigned long size;
- int rlen = 0;
- int memno = 0;
- struct resource *res;
- int np, na = prom_n_addr_cells(dev);
- unsigned long pci_addr, cpu_phys_addr;
- struct device_node *isa_dn;
-
- np = na + 5;
-
- /* From "PCI Binding to 1275"
- * The ranges property is laid out as an array of elements,
- * each of which comprises:
- * cells 0 - 2: a PCI address
- * cells 3 or 3+4: a CPU physical address
- * (size depending on dev->n_addr_cells)
- * cells 4+5 or 5+6: the size of the range
- */
- rlen = 0;
- hose->io_base_phys = 0;
- ranges = (unsigned int *) get_property(dev, "ranges", &rlen);
- while ((rlen -= np * sizeof(unsigned int)) >= 0) {
- res = NULL;
- pci_addr = (unsigned long)ranges[1] << 32 | ranges[2];
-
- cpu_phys_addr = ranges[3];
- if (na == 2)
- cpu_phys_addr = cpu_phys_addr << 32 | ranges[4];
-
- size = (unsigned long)ranges[na+3] << 32 | ranges[na+4];
-
- switch (ranges[0] >> 24) {
- case 1: /* I/O space */
- hose->io_base_phys = cpu_phys_addr;
- hose->io_base_virt = reserve_phb_iospace(size);
- PPCDBG(PPCDBG_PHBINIT,
- "phb%d io_base_phys 0x%lx io_base_virt 0x%lx\n",
- hose->global_number, hose->io_base_phys,
- (unsigned long) hose->io_base_virt);
-
- if (primary) {
- pci_io_base = (unsigned long)hose->io_base_virt;
- isa_dn = of_find_node_by_type(NULL, "isa");
- if (isa_dn) {
- isa_io_base = pci_io_base;
- pci_process_ISA_OF_ranges(isa_dn,
- hose->io_base_phys,
- hose->io_base_virt);
- of_node_put(isa_dn);
- /* Allow all IO */
- io_page_mask = -1;
- }
- }
-
- res = &hose->io_resource;
- res->flags = IORESOURCE_IO;
- res->start = pci_addr;
- res->start += (unsigned long)hose->io_base_virt -
- pci_io_base;
- break;
- case 2: /* memory space */
- memno = 0;
- while (memno < 3 && hose->mem_resources[memno].flags)
- ++memno;
-
- if (memno == 0)
- hose->pci_mem_offset = cpu_phys_addr - pci_addr;
- if (memno < 3) {
- res = &hose->mem_resources[memno];
- res->flags = IORESOURCE_MEM;
- res->start = cpu_phys_addr;
- }
- break;
- }
- if (res != NULL) {
- res->name = dev->full_name;
- res->end = res->start + size - 1;
- res->parent = NULL;
- res->sibling = NULL;
- res->child = NULL;
- }
- ranges += np;
- }
-}
-
static void python_countermeasures(unsigned long addr)
{
void *chip_regs;
struct pci_controller *phb;
unsigned int root_size_cells = 0;
unsigned int index;
- unsigned int *opprop;
+ unsigned int *opprop = NULL;
struct device_node *root = of_find_node_by_path("/");
if (naca->interrupt_controller == IC_OPEN_PIC) {
return 0;
}
+#if 0
void pcibios_name_device(struct pci_dev *dev)
{
-#if 0
struct device_node *dn;
/*
}
}
}
-#endif
}
-
-void __devinit pcibios_fixup_device_resources(struct pci_dev *dev,
- struct pci_bus *bus)
-{
- /* Update device resources. */
- struct pci_controller *hose = PCI_GET_PHB_PTR(bus);
- int i;
-
- for (i = 0; i < PCI_NUM_RESOURCES; i++) {
- if (dev->resource[i].flags & IORESOURCE_IO) {
- unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base;
- unsigned long start, end, mask;
-
- start = dev->resource[i].start += offset;
- end = dev->resource[i].end += offset;
-
- /* Need to allow IO access to pages that are in the
- ISA range */
- if (start < MAX_ISA_PORT) {
- if (end > MAX_ISA_PORT)
- end = MAX_ISA_PORT;
-
- start >>= PAGE_SHIFT;
- end >>= PAGE_SHIFT;
-
- /* get the range of pages for the map */
- mask = ((1 << (end+1))-1) ^ ((1 << start)-1);
- io_page_mask |= mask;
- }
- }
- else if (dev->resource[i].flags & IORESOURCE_MEM) {
- dev->resource[i].start += hose->pci_mem_offset;
- dev->resource[i].end += hose->pci_mem_offset;
- }
- }
-}
-EXPORT_SYMBOL(pcibios_fixup_device_resources);
-
-void __devinit pcibios_fixup_bus(struct pci_bus *bus)
-{
- struct pci_controller *hose = PCI_GET_PHB_PTR(bus);
- struct list_head *ln;
-
- /* XXX or bus->parent? */
- struct pci_dev *dev = bus->self;
- struct resource *res;
- int i;
-
- if (!dev) {
- /* Root bus. */
-
- hose->bus = bus;
- bus->resource[0] = res = &hose->io_resource;
- if (!res->flags)
- BUG(); /* No I/O resource for this PHB? */
-
- if (request_resource(&ioport_resource, res))
- printk(KERN_ERR "Failed to request IO on "
- "PCI domain %d\n", pci_domain_nr(bus));
-
-
- for (i = 0; i < 3; ++i) {
- res = &hose->mem_resources[i];
- if (!res->flags && i == 0)
- BUG(); /* No memory resource for this PHB? */
- bus->resource[i+1] = res;
- if (res->flags && request_resource(&iomem_resource, res))
- printk(KERN_ERR "Failed to request MEM on "
- "PCI domain %d\n",
- pci_domain_nr(bus));
- }
- } else if (pci_probe_only &&
- (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
- /* This is a subordinate bridge */
-
- pci_read_bridge_bases(bus);
- pcibios_fixup_device_resources(dev, bus);
- }
-
- /* XXX Need to check why Alpha doesnt do this - Anton */
- if (!pci_probe_only)
- return;
-
- for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
- struct pci_dev *dev = pci_dev_b(ln);
- if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
- pcibios_fixup_device_resources(dev, bus);
- }
-}
-EXPORT_SYMBOL(pcibios_fixup_bus);
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_name_device);
+#endif
static void check_s7a(void)
{
static void phbs_fixup_io(void)
{
- struct pci_controller *hose;
+ struct pci_controller *hose, *tmp;
- for (hose=hose_head;hose;hose=hose->next)
+ list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
remap_bus_range(hose->bus);
}
-extern void chrp_request_regions(void);
+static void __init pSeries_request_regions(void)
+{
+ struct device_node *i8042;
+
+ request_region(0x20,0x20,"pic1");
+ request_region(0xa0,0x20,"pic2");
+ request_region(0x00,0x20,"dma1");
+ request_region(0x40,0x20,"timer");
+ request_region(0x80,0x10,"dma page reg");
+ request_region(0xc0,0x20,"dma2");
+
+#define I8042_DATA_REG 0x60
+
+ /*
+ * Some machines have an unterminated i8042 so check the device
+ * tree and reserve the region if it does not appear. Later on
+ * the i8042 code will try and reserve this region and fail.
+ */
+ if (!(i8042 = of_find_node_by_type(NULL, "8042")))
+ request_region(I8042_DATA_REG, 16, "reserved (no i8042)");
+ of_node_put(i8042);
+}
void __init pSeries_final_fixup(void)
{
check_s7a();
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
+ while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
pci_read_irq_line(dev);
+ if (s7a_workaround) {
+ if (dev->irq > 16) {
+ dev->irq -= 3;
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+ }
+ }
+ }
phbs_fixup_io();
- chrp_request_regions();
+ pSeries_request_regions();
pci_fix_bus_sysdata();
- if (!ppc64_iommu_off)
+
+ if (!of_chosen || !get_property(of_chosen, "linux,iommu-off", NULL))
iommu_setup_pSeries();
-}
-/***********************************************************************
- * pci_find_hose_for_OF_device
- *
- * This function finds the PHB that matching device_node in the
- * OpenFirmware by scanning all the pci_controllers.
- *
- ***********************************************************************/
-struct pci_controller*
-pci_find_hose_for_OF_device(struct device_node *node)
-{
- while (node) {
- struct pci_controller *hose;
- for (hose=hose_head;hose;hose=hose->next)
- if (hose->arch_data == node)
- return hose;
- node=node->parent;
- }
- return NULL;
+ pci_addr_cache_build();
}
-/*
- * ppc64 can have multifunction devices that do not respond to function 0.
- * In this case we must scan all functions.
- */
-int
-pcibios_scan_all_fns(struct pci_bus *bus, int devfn)
-{
- struct device_node *busdn, *dn;
-
- if (bus->self)
- busdn = pci_device_to_OF_node(bus->self);
- else
- busdn = bus->sysdata; /* must be a phb */
-
- /*
- * Check to see if there is any of the 8 functions are in the
- * device tree. If they are then we need to scan all the
- * functions of this slot.
- */
- for (dn = busdn->child; dn; dn = dn->sibling)
- if ((dn->devfn >> 3) == (devfn >> 3))
- return 1;
-
- return 0;
-}
git://git.onelab.eu / linux-2.6.git / blobdiff