#include <stdarg.h>
#define WANT_PPCDBG_TAB /* Only defined here */
-#include <linux/config.h>
-#include <linux/types.h>
#include <asm/ppcdebug.h>
#include <asm/processor.h>
#include <asm/naca.h>
#include <asm/prom.h>
#include <asm/pmac_feature.h>
-extern u8 real_readb(volatile u8 __iomem *addr);
-extern void real_writeb(u8 data, volatile u8 __iomem *addr);
-
struct NS16550 {
/* this struct must be packed */
unsigned char rbr; /* 0 */
#define LSR_TEMT 0x40 /* Xmitter empty */
#define LSR_ERR 0x80 /* Error */
-static volatile struct NS16550 __iomem *udbg_comport;
+static volatile struct NS16550 *udbg_comport;
-void udbg_init_uart(void __iomem *comport, unsigned int speed)
+void udbg_init_uart(void *comport)
{
- u16 dll = speed ? (115200 / speed) : 12;
-
if (comport) {
- udbg_comport = (struct NS16550 __iomem *)comport;
- out_8(&udbg_comport->lcr, 0x00);
- out_8(&udbg_comport->ier, 0xff);
- out_8(&udbg_comport->ier, 0x00);
- out_8(&udbg_comport->lcr, 0x80); /* Access baud rate */
- out_8(&udbg_comport->dll, dll & 0xff); /* 1 = 115200, 2 = 57600,
- 3 = 38400, 12 = 9600 baud */
- out_8(&udbg_comport->dlm, dll >> 8); /* dll >> 8 which should be zero
- for fast rates; */
- out_8(&udbg_comport->lcr, 0x03); /* 8 data, 1 stop, no parity */
- out_8(&udbg_comport->mcr, 0x03); /* RTS/DTR */
- out_8(&udbg_comport->fcr ,0x07); /* Clear & enable FIFOs */
+ udbg_comport = (struct NS16550 *)comport;
+ udbg_comport->lcr = 0x00; eieio();
+ udbg_comport->ier = 0xFF; eieio();
+ udbg_comport->ier = 0x00; eieio();
+ udbg_comport->lcr = 0x80; eieio(); /* Access baud rate */
+ udbg_comport->dll = 12; eieio(); /* 1 = 115200, 2 = 57600, 3 = 38400, 12 = 9600 baud */
+ udbg_comport->dlm = 0; eieio(); /* dll >> 8 which should be zero for fast rates; */
+ udbg_comport->lcr = 0x03; eieio(); /* 8 data, 1 stop, no parity */
+ udbg_comport->mcr = 0x03; eieio(); /* RTS/DTR */
+ udbg_comport->fcr = 0x07; eieio(); /* Clear & enable FIFOs */
}
}
#define SCC_TXRDY 4
#define SCC_RXRDY 1
-static volatile u8 __iomem *sccc;
-static volatile u8 __iomem *sccd;
+static volatile u8 *sccc, *sccd;
static unsigned char scc_inittab[] = {
13, 0, /* set baud rate divisor */
/* Setup for 57600 8N1 */
addr += 0x20;
- sccc = (volatile u8 * __iomem) ioremap(addr & PAGE_MASK, PAGE_SIZE) ;
+ sccc = (volatile u8 *) ioremap(addr & PAGE_MASK, PAGE_SIZE) ;
sccc += addr & ~PAGE_MASK;
sccd = sccc + 0x10;
mb();
for (i = 20000; i != 0; --i)
- x = in_8(sccc);
- out_8(sccc, 0x09); /* reset A or B side */
- out_8(sccc, 0xc0);
- for (i = 0; i < sizeof(scc_inittab); ++i)
- out_8(sccc, scc_inittab[i]);
+ x = *sccc; eieio();
+ *sccc = 9; eieio(); /* reset A or B side */
+ *sccc = 0xc0; eieio();
+ for (i = 0; i < sizeof(scc_inittab); ++i) {
+ *sccc = scc_inittab[i];
+ eieio();
+ }
ppc_md.udbg_putc = udbg_putc;
ppc_md.udbg_getc = udbg_getc;
#endif /* CONFIG_PPC_PMAC */
#if CONFIG_PPC_PMAC
+extern u8 real_readb(volatile u8 *addr);
+extern void real_writeb(u8 data, volatile u8 *addr);
+
static void udbg_real_putc(unsigned char c)
{
while ((real_readb(sccc) & SCC_TXRDY) == 0)
void udbg_init_pmac_realmode(void)
{
- sccc = (volatile u8 __iomem *)0x80013020ul;
- sccd = (volatile u8 __iomem *)0x80013030ul;
+ sccc = (volatile u8 *)0x80013020ul;
+ sccd = (volatile u8 *)0x80013030ul;
ppc_md.udbg_putc = udbg_real_putc;
ppc_md.udbg_getc = NULL;
}
#endif /* CONFIG_PPC_PMAC */
-#ifdef CONFIG_PPC_MAPLE
-void udbg_maple_real_putc(unsigned char c)
-{
- if (udbg_comport) {
- while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
- /* wait for idle */;
- real_writeb(c, &udbg_comport->thr); eieio();
- if (c == '\n') {
- /* Also put a CR. This is for convenience. */
- while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
- /* wait for idle */;
- real_writeb('\r', &udbg_comport->thr); eieio();
- }
- }
-}
-
-void udbg_init_maple_realmode(void)
-{
- udbg_comport = (volatile struct NS16550 __iomem *)0xf40003f8;
-
- ppc_md.udbg_putc = udbg_maple_real_putc;
- ppc_md.udbg_getc = NULL;
- ppc_md.udbg_getc_poll = NULL;
-}
-#endif /* CONFIG_PPC_MAPLE */
-
void udbg_putc(unsigned char c)
{
if (udbg_comport) {
- while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
+ while ((udbg_comport->lsr & LSR_THRE) == 0)
/* wait for idle */;
- out_8(&udbg_comport->thr, c);
+ udbg_comport->thr = c; eieio();
if (c == '\n') {
/* Also put a CR. This is for convenience. */
- while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
- /* wait for idle */;
- out_8(&udbg_comport->thr, '\r');
+ while ((udbg_comport->lsr & LSR_THRE) == 0)
+ /* wait for idle */;
+ udbg_comport->thr = '\r'; eieio();
}
}
#ifdef CONFIG_PPC_PMAC
else if (sccc) {
- while ((in_8(sccc) & SCC_TXRDY) == 0)
- ;
- out_8(sccd, c);
+ while ((*sccc & SCC_TXRDY) == 0)
+ eieio();
+ *sccd = c;
+ eieio();
if (c == '\n')
udbg_putc('\r');
}
int udbg_getc_poll(void)
{
if (udbg_comport) {
- if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
- return in_8(&udbg_comport->rbr);
+ if ((udbg_comport->lsr & LSR_DR) != 0)
+ return udbg_comport->rbr;
else
return -1;
}
#ifdef CONFIG_PPC_PMAC
else if (sccc) {
- if ((in_8(sccc) & SCC_RXRDY) != 0)
- return in_8(sccd);
+ eieio();
+ if ((*sccc & SCC_RXRDY) != 0)
+ return *sccd;
else
return -1;
}
unsigned char udbg_getc(void)
{
if (udbg_comport) {
- while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
+ while ((udbg_comport->lsr & LSR_DR) == 0)
/* wait for char */;
- return in_8(&udbg_comport->rbr);
+ return udbg_comport->rbr;
}
#ifdef CONFIG_PPC_PMAC
else if (sccc) {
- while ((in_8(sccc) & SCC_RXRDY) == 0)
- ;
- return in_8(sccd);
+ eieio();
+ while ((*sccc & SCC_RXRDY) == 0)
+ eieio();
+ return *sccd;
}
#endif /* CONFIG_PPC_PMAC */
return 0;
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