#define HPTE_LOCK_BIT 3
-static spinlock_t native_tlbie_lock = SPIN_LOCK_UNLOCKED;
+static DEFINE_SPINLOCK(native_tlbie_lock);
static inline void native_lock_hpte(HPTE *hptep)
{
unsigned long hpteflags, int bolted, int large)
{
unsigned long arpn = physRpn_to_absRpn(prpn);
- HPTE *hptep = htab_data.htab + hpte_group;
+ HPTE *hptep = htab_address + hpte_group;
Hpte_dword0 dw0;
HPTE lhpte;
int i;
slot_offset = mftb() & 0x7;
for (i = 0; i < HPTES_PER_GROUP; i++) {
- hptep = htab_data.htab + hpte_group + slot_offset;
+ hptep = htab_address + hpte_group + slot_offset;
dw0 = hptep->dw0.dw0;
if (dw0.v && !dw0.bolted) {
hash = hpt_hash(vpn, 0);
for (j = 0; j < 2; j++) {
- slot = (hash & htab_data.htab_hash_mask) * HPTES_PER_GROUP;
+ slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
for (i = 0; i < HPTES_PER_GROUP; i++) {
- hptep = htab_data.htab + slot;
+ hptep = htab_address + slot;
dw0 = hptep->dw0.dw0;
if ((dw0.avpn == (vpn >> 11)) && dw0.v &&
static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
unsigned long va, int large, int local)
{
- HPTE *hptep = htab_data.htab + slot;
+ HPTE *hptep = htab_address + slot;
Hpte_dword0 dw0;
unsigned long avpn = va >> 23;
int ret = 0;
*/
static void native_hpte_updateboltedpp(unsigned long newpp, unsigned long ea)
{
- unsigned long vsid, va, vpn, flags;
+ unsigned long vsid, va, vpn, flags = 0;
long slot;
HPTE *hptep;
int lock_tlbie = !(cur_cpu_spec->cpu_features & CPU_FTR_LOCKLESS_TLBIE);
slot = native_hpte_find(vpn);
if (slot == -1)
panic("could not find page to bolt\n");
- hptep = htab_data.htab + slot;
+ hptep = htab_address + slot;
set_pp_bit(newpp, hptep);
static void native_hpte_invalidate(unsigned long slot, unsigned long va,
int large, int local)
{
- HPTE *hptep = htab_data.htab + slot;
+ HPTE *hptep = htab_address + slot;
Hpte_dword0 dw0;
unsigned long avpn = va >> 23;
unsigned long flags;
secondary = (pte_val(batch->pte[i]) & _PAGE_SECONDARY) >> 15;
if (secondary)
hash = ~hash;
- slot = (hash & htab_data.htab_hash_mask) * HPTES_PER_GROUP;
+ slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
slot += (pte_val(batch->pte[i]) & _PAGE_GROUP_IX) >> 12;
- hptep = htab_data.htab + slot;
+ hptep = htab_address + slot;
avpn = va >> 23;
if (large)
local_irq_restore(flags);
}
-void hpte_init_native(void)
-{
#ifdef CONFIG_PPC_PSERIES
- struct device_node *root;
- const char *model;
-#endif /* CONFIG_PPC_PSERIES */
+/* Disable TLB batching on nighthawk */
+static inline int tlb_batching_enabled(void)
+{
+ struct device_node *root = of_find_node_by_path("/");
+ int enabled = 1;
+
+ if (root) {
+ const char *model = get_property(root, "model", NULL);
+ if (model && !strcmp(model, "IBM,9076-N81"))
+ enabled = 0;
+ of_node_put(root);
+ }
+
+ return enabled;
+}
+#else
+static inline int tlb_batching_enabled(void)
+{
+ return 1;
+}
+#endif
+void hpte_init_native(void)
+{
ppc_md.hpte_invalidate = native_hpte_invalidate;
ppc_md.hpte_updatepp = native_hpte_updatepp;
ppc_md.hpte_updateboltedpp = native_hpte_updateboltedpp;
ppc_md.hpte_insert = native_hpte_insert;
ppc_md.hpte_remove = native_hpte_remove;
-
-#ifdef CONFIG_PPC_PSERIES
- /* Disable TLB batching on nighthawk */
- root = of_find_node_by_path("/");
- if (root) {
- model = get_property(root, "model", NULL);
- if (!strcmp(model, "CHRP IBM,9076-N81")) {
- of_node_put(root);
- goto bail;
- }
- of_node_put(root);
- }
-#endif /* CONFIG_PPC_PSERIES */
-
- ppc_md.flush_hash_range = native_flush_hash_range;
- bail:
+ if (tlb_batching_enabled())
+ ppc_md.flush_hash_range = native_flush_hash_range;
htab_finish_init();
}