#include <asm/paca.h>
#include <asm/cputable.h>
+struct stab_entry {
+ unsigned long esid_data;
+ unsigned long vsid_data;
+};
+
/* Both the segment table and SLB code uses the following cache */
#define NR_STAB_CACHE_ENTRIES 8
DEFINE_PER_CPU(long, stab_cache_ptr);
{
unsigned long vsid = get_kernel_vsid(KERNELBASE);
- if (cur_cpu_spec->cpu_features & CPU_FTR_SLB) {
+ if (cpu_has_feature(CPU_FTR_SLB)) {
slb_initialize();
} else {
asm volatile("isync; slbia; isync":::"memory");