#define LANAI_EEPROM_SIZE (128)
typedef int vci_t;
-typedef unsigned long bus_addr_t;
+typedef void __iomem *bus_addr_t;
/* DMA buffer in host memory for TX, RX, or service list. */
struct lanai_buffer {
static inline bus_addr_t reg_addr(const struct lanai_dev *lanai,
enum lanai_register reg)
{
- return lanai->base + (bus_addr_t) reg;
+ return lanai->base + reg;
}
static inline u32 reg_read(const struct lanai_dev *lanai,
{
u32 val;
APRINTK(lvcc->vbase != 0, "cardvcc_read: unbound vcc!\n");
- val= readl(lvcc->vbase + (bus_addr_t) offset);
+ val= readl(lvcc->vbase + offset);
RWDEBUG("VR vci=%04d 0x%02X = 0x%08X\n",
lvcc->vci, (int) offset, val);
return val;
(unsigned int) val, lvcc->vci, (unsigned int) offset);
RWDEBUG("VW vci=%04d 0x%02X > 0x%08X\n",
lvcc->vci, (unsigned int) offset, (unsigned int) val);
- writel(val, lvcc->vbase + (bus_addr_t) offset);
+ writel(val, lvcc->vbase + offset);
}
/* -------------------- COMPUTE SIZE OF AN AAL5 PDU: */
DPRINTK("read, write = %d, %d\n", read, write);
break;
}
- schedule_timeout(HZ / 25);
+ msleep(40);
}
/* 15.2.2 - clear out all tx registers */
cardvcc_write(lvcc, 0, vcc_txreadptr);
/* 3.2: PCI initialization */
if ((result = lanai_pci_start(lanai)) != 0)
goto error;
- raw_base = (bus_addr_t) lanai->pci->resource[0].start;
+ raw_base = lanai->pci->resource[0].start;
lanai->base = (bus_addr_t) ioremap(raw_base, LANAI_MAPPING_SIZE);
if (lanai->base == 0) {
printk(KERN_ERR DEV_LABEL ": couldn't remap I/O space\n");