RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
- BEGIN_RING( 17 );
+ BEGIN_RING( (count < 3? count: 3) * 5 + 2 );
if ( count >= 1 ) {
OUT_RING( CCE_PACKET0( R128_AUX1_SC_LEFT, 3 ) );
count = depth->n;
if (count > 4096 || count <= 0)
- return -EMSGSIZE;
+ return DRM_ERR(EMSGSIZE);
if ( DRM_COPY_FROM_USER( &x, depth->x, sizeof(x) ) ) {
return DRM_ERR(EFAULT);
DRM_DEBUG( "\n" );
count = depth->n;
- if (count > 4096 || count <= 0)
- return -EMSGSIZE;
+ if (count > 4096 || count <= 0)
+ return DRM_ERR(EMSGSIZE);
xbuf_size = count * sizeof(*x);
ybuf_size = count * sizeof(*y);
count = depth->n;
if (count > 4096 || count <= 0)
- return -EMSGSIZE;
+ return DRM_ERR(EMSGSIZE);
if ( DRM_COPY_FROM_USER( &x, depth->x, sizeof(x) ) ) {
return DRM_ERR(EFAULT);
count = depth->n;
if (count > 4096 || count <= 0)
- return -EMSGSIZE;
+ return DRM_ERR(EMSGSIZE);
if ( count > dev_priv->depth_pitch ) {
count = dev_priv->depth_pitch;
sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS;
r128_cce_dispatch_clear( dev, &clear );
+ COMMIT_RING();
/* Make sure we restore the 3D state next time.
*/
R128_WRITE( R128_CRTC_OFFSET, dev_priv->crtc_offset );
R128_WRITE( R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl );
- if (dev_priv->current_page != 0)
+ if (dev_priv->current_page != 0) {
r128_cce_dispatch_flip( dev );
+ COMMIT_RING();
+ }
dev_priv->page_flipping = 0;
return 0;
r128_cce_dispatch_flip( dev );
+ COMMIT_RING();
return 0;
}
dev_priv->sarea_priv->dirty |= (R128_UPLOAD_CONTEXT |
R128_UPLOAD_MASKS);
+ COMMIT_RING();
return 0;
}
r128_cce_dispatch_vertex( dev, buf );
+ COMMIT_RING();
return 0;
}
r128_cce_dispatch_indices( dev, buf, elts.start, elts.end, count );
+ COMMIT_RING();
return 0;
}
drm_device_dma_t *dma = dev->dma;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_blit_t blit;
+ int ret;
LOCK_TEST_WITH_RETURN( dev, filp );
RING_SPACE_TEST_WITH_RETURN( dev_priv );
VB_AGE_TEST_WITH_RETURN( dev_priv );
- return r128_cce_dispatch_blit( filp, dev, &blit );
+ ret = r128_cce_dispatch_blit( filp, dev, &blit );
+
+ COMMIT_RING();
+ return ret;
}
int r128_cce_depth( DRM_IOCTL_ARGS )
DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_depth_t depth;
+ int ret;
LOCK_TEST_WITH_RETURN( dev, filp );
RING_SPACE_TEST_WITH_RETURN( dev_priv );
+ ret = DRM_ERR(EINVAL);
switch ( depth.func ) {
case R128_WRITE_SPAN:
- return r128_cce_dispatch_write_span( dev, &depth );
+ ret = r128_cce_dispatch_write_span( dev, &depth );
case R128_WRITE_PIXELS:
- return r128_cce_dispatch_write_pixels( dev, &depth );
+ ret = r128_cce_dispatch_write_pixels( dev, &depth );
case R128_READ_SPAN:
- return r128_cce_dispatch_read_span( dev, &depth );
+ ret = r128_cce_dispatch_read_span( dev, &depth );
case R128_READ_PIXELS:
- return r128_cce_dispatch_read_pixels( dev, &depth );
+ ret = r128_cce_dispatch_read_pixels( dev, &depth );
}
- return DRM_ERR(EINVAL);
+ COMMIT_RING();
+ return ret;
}
int r128_cce_stipple( DRM_IOCTL_ARGS )
r128_cce_dispatch_stipple( dev, mask );
+ COMMIT_RING();
return 0;
}
*/
r128_cce_dispatch_indirect( dev, buf, indirect.start, indirect.end );
+ COMMIT_RING();
return 0;
}