linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / drivers / char / drm / radeon_drv.h

diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h
index e5a256f..1f7d2ab 100644 (file)
--- a/drivers/char/drm/radeon_drv.h
+++ b/drivers/char/drm/radeon_drv.h
@@ -38,7 +38,7 @@
 
 #define DRIVER_NAME            "radeon"
 #define DRIVER_DESC            "ATI Radeon"
-#define DRIVER_DATE            "20060524"
+#define DRIVER_DATE            "20051229"
 
 /* Interface history:
  *
@@ -91,13 +91,9 @@
  * 1.20- Add support for r300 texrect
  * 1.21- Add support for card type getparam
  * 1.22- Add support for texture cache flushes (R300_TX_CNTL)
- * 1.23- Add new radeon memory map work from benh
- * 1.24- Add general-purpose packet for manipulating scratch registers (r300)
- * 1.25- Add support for r200 vertex programs (R200_EMIT_VAP_PVS_CNTL,
- *       new packet type)
  */
 #define DRIVER_MAJOR           1
-#define DRIVER_MINOR           25
+#define DRIVER_MINOR           22
 #define DRIVER_PATCHLEVEL      0
 
 /*
@@ -105,21 +101,20 @@
  */
 enum radeon_family {
        CHIP_R100,
-       CHIP_RV100,
        CHIP_RS100,
+       CHIP_RV100,
        CHIP_RV200,
-       CHIP_RS200,
        CHIP_R200,
+       CHIP_RS200,
+       CHIP_R250,
+       CHIP_RS250,
        CHIP_RV250,
-       CHIP_RS300,
        CHIP_RV280,
        CHIP_R300,
+       CHIP_RS300,
        CHIP_R350,
        CHIP_RV350,
-       CHIP_RV380,
        CHIP_R420,
-       CHIP_RV410,
-       CHIP_RS400,
        CHIP_LAST,
 };
 
@@ -141,11 +136,9 @@ enum radeon_chip_flags {
        CHIP_IS_AGP = 0x00080000UL,
        CHIP_HAS_HIERZ = 0x00100000UL,
        CHIP_IS_PCIE = 0x00200000UL,
-       CHIP_NEW_MEMMAP = 0x00400000UL,
 };
 
-#define GET_RING_HEAD(dev_priv)        (dev_priv->writeback_works ? \
-        DRM_READ32(  (dev_priv)->ring_rptr, 0 ) : RADEON_READ(RADEON_CP_RB_RPTR))
+#define GET_RING_HEAD(dev_priv)                DRM_READ32(  (dev_priv)->ring_rptr, 0 )
 #define SET_RING_HEAD(dev_priv,val)    DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) )
 
 typedef struct drm_radeon_freelist {
@@ -206,8 +199,6 @@ typedef struct drm_radeon_private {
        drm_radeon_sarea_t *sarea_priv;
 
        u32 fb_location;
-       u32 fb_size;
-       int new_memmap;
 
        int gart_size;
        u32 gart_vm_start;
@@ -281,8 +272,6 @@ typedef struct drm_radeon_private {
        unsigned long pcigart_offset;
        drm_ati_pcigart_info gart_info;
 
-       u32 scratch_ages[5];
-
        /* starting from here on, data is preserved accross an open */
        uint32_t flags;         /* see radeon_chip_flags */
 } drm_radeon_private_t;
@@ -886,8 +875,6 @@ extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp,
 #define RADEON_PP_CUBIC_OFFSET_T1_0         0x1e00
 #define RADEON_PP_CUBIC_OFFSET_T2_0         0x1e14
 
-#define RADEON_SE_TCL_STATE_FLUSH           0x2284
-
 #define SE_VAP_CNTL__TCL_ENA_MASK                          0x00000001
 #define SE_VAP_CNTL__FORCE_W_TO_ONE_MASK                   0x00010000
 #define SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT                 0x00000012
@@ -909,8 +896,6 @@ extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp,
 #define R200_PP_AFS_0                     0x2f80
 #define R200_PP_AFS_1                     0x2f00       /* same as txcblend_0 */
 
-#define R200_VAP_PVS_CNTL_1               0x22D0
-
 /* Constants */
 #define RADEON_MAX_USEC_TIMEOUT                100000  /* 100 ms */